Patents by Inventor Tadashi Arai

Tadashi Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11965049
    Abstract: Photosensitive compositions containing nanosized light emitting materials and (meth)acrylic polymer are suitable for use in a variety of optical applications, for example the preparation of quantum material doped photoresist films, especially for optical devices. Optical films can be prepared be by: a) providing the photosensitive composition onto a substrate, and b) polymerizing the photosensitive composition by exposing the photosensitive composition to radiation.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: April 23, 2024
    Assignee: MERCK PATENT GMBH
    Inventors: Tadashi Kishimoto, Yuko Arai, Masayoshi Suzuki, Daishi Yokoyama, Katsuto Taniguchi
  • Publication number: 20240060541
    Abstract: A novel disc brake shim and disc brake that can effectively suppress occurrence of vibration and squeal, are easy to manufacture and have excellent quality stability are provided. The disc brake shim includes a base material layer formed of a metal sheet, and a rubber layer that is laminated and disposed on at least a part of a main surface on one side of the base material layer and contains pores derived from a plurality of hollow microcapsules inside, and the disc brake includes pad materials on both sides in an axial direction of a disc rotor, and shims on opposite sides from the disc rotor, of the pad materials adjacently, wherein each of the shims is the disc brake shim of the present invention.
    Type: Application
    Filed: December 15, 2021
    Publication date: February 22, 2024
    Inventors: Junichi KONDOH, Toshiharu ANEGAWA, Tadashi ARAI
  • Publication number: 20230093818
    Abstract: A semiconductor device includes: a first semiconductor chip including a first coil that generates a magnetic field signal; a wiring board including a second coil, a third coil, and a twisted pair wiring, the second coil being disposed to face the first coil and receiving the magnetic field signal generated by the first coil, the twisted pair wiring connecting the second coil with the third coil; and a second semiconductor chip including a fourth coil disposed to face the third coil and receiving a magnetic field signal generated by the third coil.
    Type: Application
    Filed: March 1, 2022
    Publication date: March 30, 2023
    Inventors: Takeshi MURASAKI, Tadashi ARAI, Makoto ARAI, Shoji OOTAKA, Yusuke IMAIZUMI
  • Publication number: 20220389980
    Abstract: A novel disc brake shim and a disc brake that can effectively suppress vibration and squeal are provided. The disc brake shim that is formed of a multilayer structure with three layers or more including at least a base material layer formed of a metal sheet, and a foamed rubber layer that is laminated on a main surface on one side of the base material layer, wherein the foamed rubber layer is an intermediate layer of the multilayer structure, and the disc brake including pad materials on both sides in an axial direction of a disc rotor, and shims on opposite sides from the disc rotor, of the pad materials adjacently, wherein each of the shims is the disc brake shim according to the present invention.
    Type: Application
    Filed: June 16, 2020
    Publication date: December 8, 2022
    Inventors: Junichi KONDOH, Toshiharu ANEGAWA, Yuki SOEDA, Tadashi ARAI
  • Publication number: 20220311398
    Abstract: An isolation amplifier of an embodiment includes: a primary circuit including an encoder configured to encode an input signal and output the encoded input signal and an anomaly detection circuit configured to detect anomaly having occurred to the input signal and generate a detection signal; an isolation unit configured to insulate the primary circuit from a secondary circuit; an output circuit configured to generate an output signal corresponding to the input signal; and an anomaly-input sensing-output circuit configured to generate an output signal from the secondary circuit by changing the output signal from the output circuit based on the detection signal.
    Type: Application
    Filed: September 7, 2021
    Publication date: September 29, 2022
    Inventors: Makoto ARAI, Masaki NISHIKAWA, Shoji OOTAKA, Tadashi ARAI, Manabu YAMADA, Shigeyasu IWATA, Takeshi MURASAKI
  • Publication number: 20220252119
    Abstract: A novel disc brake shim and disc brake that can effectively suppress vibration and squeal are provided. The disc brake shim includes a base material layer formed of a metal sheet, and a foamed rubber layer that is laminated on at least a part of a main surface on one side of the base material layer, the foamed rubber layer being an outermost layer once arranged, and the disc brake includes pad materials on both sides in an axial direction of a disc rotor, and shims on opposite sides from the disc rotor, of the pad materials adjacently, wherein each of the shims is the disc brake shim of the present invention.
    Type: Application
    Filed: June 16, 2020
    Publication date: August 11, 2022
    Inventors: Junichi KONDOH, Toshiharu ANEGAWA, Yuki SOEDA, Tadashi ARAI
  • Patent number: 10424428
    Abstract: An object is to provide a super-conducting coil and a magnetic resonance imaging device that are quench-free by reducing Joule heat generated upon occurrence of separation of members even in a high magnetic field. The super-conducting coil in accordance with the present invention includes a spool and a super-conducting wire wound around the spool. The coil further includes, between the spool and the super-conducting wire, a first resin layer containing thermoplastic resin, a second resin layer containing thermosetting resin, and a mixed layer, the mixed layer being positioned between the first resin layer and the second resin layer and containing a mixture of the thermoplastic resin and the thermosetting resin.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: September 24, 2019
    Assignee: HITACHI, LTD.
    Inventors: Masahiro Kawasaki, Kenji Okishiro, Tadashi Arai, Akihisa Miyazoe
  • Patent number: 10290570
    Abstract: A wiring substrate includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a first adhesive layer and conductive paste. The first adhesive layer is on a surface of a first insulating layer. The conductive paste is in an opening in the first adhesive layer. The second substrate includes a second adhesive layer and a protruding electrode. The second adhesive layer is on a surface of a second insulating layer facing toward the first substrate, and is bonded to the first adhesive layer. The protruding electrode has an end uncovered by the second adhesive layer, and is electrically connected to the conductive paste.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: May 14, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tadashi Arai, Yoshikazu Hirabayashi, Hidetoshi Arai, Tadashi Kodaira
  • Patent number: 10282487
    Abstract: A mask data generation method includes obtaining data of a pattern including a plurality of pattern elements, dividing a region of the pattern into a plurality of sections so that each pattern element is arranged in each section by using the obtained data of the pattern and generating map data including information indicative of presence or absence of the pattern element in each section, setting one piece of mask individual information out of a plurality pieces of mask individual information for each section including the pattern element by using a constraint condition, which inhibits setting of same mask individual information in a constraint region including one section and surrounding sections thereof, and the map data, and generating the data of the plurality of masks corresponding to the plurality pieces of mask individual information by using the set mask individual information.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: May 7, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventor: Tadashi Arai
  • Patent number: 10134680
    Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 20, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
  • Patent number: 10121695
    Abstract: A semiconductor device includes a wiring substrate, a semiconductor chip, conductive paste, and an adhesive layer. The wiring substrate includes an insulating layer and a wiring layer on a surface of the insulating layer. The semiconductor chip includes a circuit-formation surface in which an electrode pad is provided, and is mounted on the wiring substrate with the circuit-formation surface facing toward the wiring layer. The conductive paste electrically connects the wiring layer and the electrode pad. The adhesive layer is over the entirety of the surface of the insulating layer, and covers the wiring layer and the conductive paste. The adhesive layer fills in a gap between the surface of the insulating layer and the circuit-formation surface, to bond the wiring substrate and the semiconductor chip. The adhesive layer extends onto a side surface of the semiconductor chip to form a fillet.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: November 6, 2018
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tadashi Arai, Yoshikazu Hirabayashi, Hidetoshi Arai, Tadashi Kodaira
  • Publication number: 20180215129
    Abstract: A functionally graded material according to the present invention adopts, for example, the following configuration. A functionally graded material is constituted by laminating a plurality of resin compositions. Among the plurality of resin compositions, a first resin composition has a different property from a second resin composition adjacent to the first resin composition. An interface between the first resin composition and the second resin composition is joined by a dynamic covalent bond.
    Type: Application
    Filed: July 31, 2015
    Publication date: August 2, 2018
    Applicant: HITACHI, LTD.
    Inventors: Yasuhiko TADA, Takahito MURAKI, Yuri KAJIHARA, Takeshi KONDO, Tadashi ARAI
  • Publication number: 20180218972
    Abstract: A wiring substrate includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a first adhesive layer and conductive paste. The first adhesive layer is on a surface of a first insulating layer. The conductive paste is in an opening in the first adhesive layer. The second substrate includes a second adhesive layer and a protruding electrode. The second adhesive layer is on a surface of a second insulating layer facing toward the first substrate, and is bonded to the first adhesive layer. The protruding electrode has an end uncovered by the second adhesive layer, and is electrically connected to the conductive paste.
    Type: Application
    Filed: January 10, 2018
    Publication date: August 2, 2018
    Inventors: Tadashi ARAI, Yoshikazu HIRABAYASHI, Hidetoshi ARAI, Tadashi KODAIRA
  • Publication number: 20180218941
    Abstract: A semiconductor device includes a wiring substrate, a semiconductor chip, conductive paste, and an adhesive layer. The wiring substrate includes an insulating layer and a wiring layer on a surface of the insulating layer. The semiconductor chip includes a circuit-formation surface in which an electrode pad is provided, and is mounted on the wiring substrate with the circuit-formation surface facing toward the wiring layer. The conductive paste electrically connects the wiring layer and the electrode pad. The adhesive layer is over the entirety of the surface of the insulating layer, and covers the wiring layer and the conductive paste. The adhesive layer fills in a gap between the surface of the insulating layer and the circuit-formation surface, to bond the wiring substrate and the semiconductor chip. The adhesive layer extends onto a side surface of the semiconductor chip to form a fillet.
    Type: Application
    Filed: December 22, 2017
    Publication date: August 2, 2018
    Inventors: Tadashi ARAI, Yoshikazu HIRABAYASHI, Hidetoshi ARAI, Tadashi KODAIRA
  • Publication number: 20180009955
    Abstract: A resin produced by a conventional technique has a weak nature in terms of hydrolysis resistance. For example, in a case where the resin produced by a conventional technique is used in an area with a highly humid climate such as Japan for a long period of time, deterioration of the resin due to hydrolysis becomes a concern. A resin composition is described that is optimized in the molecular structure design of the resin and in the catalyst in order to improve the hydrolysis resistance. Specifically, the resin composition contains (1) a copolymer of a vinyl compound having two or more epoxy groups, a carboxylic acid anhydride, and a transesterification reaction catalyst, or (2) a copolymer of a vinyl compound having two or more carboxylic acid anhydride groups, an epoxy, and a transesterification reaction catalyst.
    Type: Application
    Filed: January 12, 2016
    Publication date: January 11, 2018
    Applicant: HITACHI, LTD.
    Inventors: Yuri KAJIHARA, Takahito MURAKI, Tadashi ARAI, Yasuhiko TADA
  • Publication number: 20170365559
    Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.
    Type: Application
    Filed: August 14, 2017
    Publication date: December 21, 2017
    Inventors: Takaharu YAMANO, Hajime IIZUKA, Hideaki SAKAGUCHI, Toshio KOBAYASHI, Tadashi ARAI, Tsuyoshi KOBAYASHI, Tetsuya KOYAMA, Kiyoaki IIDA, Tomoaki MASHIMA, Koichi TANAKA, Yuji KUNIMOTO, Takashi YANAGISAWA
  • Patent number: 9811623
    Abstract: A method for generating a pattern includes defining a footprint of a main pattern in each cell, arranging a first cell and a second cell which has an auxiliary pattern outside the footprint of the main pattern, side by side in such a manner that the auxiliary pattern outside the footprint of the second cell is present in the footprint of the main pattern of the first cell, and generating the pattern of the mask by removing a pattern element of the auxiliary pattern outside the footprint of the second cell in a portion where the pattern element of the auxiliary pattern outside the footprint of the second cell is close to or overlaps with the main pattern in the first cell of the first cell and the second cell arranged side by side.
    Type: Grant
    Filed: July 17, 2015
    Date of Patent: November 7, 2017
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Hiroyuki Ishii, Ryo Nakayama, Tadashi Arai
  • Patent number: 9768122
    Abstract: An electronic part embedded substrate is disclosed. The electronic part embedded substrate includes a first substrate, a second substrate, an electronic part, an electrically connecting member, and a sealing member. A method of producing an electronic part embedded substrate is also disclosed. The method includes mounting an electronic part onto a first substrate, laminating a second substrate on the first substrate through an electrically connecting member; and filling a space between the first substrate and the second substrate with a sealing member to seal the electronic part.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: September 19, 2017
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Takaharu Yamano, Hajime Iizuka, Hideaki Sakaguchi, Toshio Kobayashi, Tadashi Arai, Tsuyoshi Kobayashi, Tetsuya Koyama, Kiyoaki Iida, Tomoaki Mashima, Koichi Tanaka, Yuji Kunimoto, Takashi Yanagisawa
  • Patent number: 9672300
    Abstract: A pattern generation method for generating a pattern of a cell used to generate a pattern of a mask using a computer, includes obtaining data of pattern of the cell, calculating image of the pattern of the cell to obtain an evaluation value of the image by repeatedly changing a parameter value of an exposure condition when the mask which has the pattern of the cell is illuminated to project image of the pattern of the cell onto a substrate to expose the substrate, and a parameter value of the pattern of the cell, and determining parameter value of the pattern of the cell when the evaluation value satisfies a predetermined evaluation standard.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: June 6, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Mikami, Tadashi Arai, Hiroyuki Ishii
  • Publication number: 20170092397
    Abstract: An object is to provide a super-conducting coil and a magnetic resonance imaging device that are quench-free by reducing Joule heat generated upon occurrence of separation of members even in a high magnetic field. The super-conducting coil in accordance with the present invention includes a spool and a super-conducting wire wound around the spool. The coil further includes, between the spool and the super-conducting wire, a first resin layer containing thermoplastic resin, a second resin layer containing thermosetting resin, and a mixed layer, the mixed layer being positioned between the first resin layer and the second resin layer and containing a mixture of the thermoplastic resin and the thermosetting resin.
    Type: Application
    Filed: June 17, 2015
    Publication date: March 30, 2017
    Applicant: HITACHI, LTD.
    Inventors: Masahiro KAWASAKI, Kenji OKISHIRO, Tadashi ARAI, Akihisa MIYAZOE