Abstract: In a method of an embodiment, radio-frequency power is supplied to an electrode via a matching device from a radio-frequency power supply in order to generate plasma within a chamber. During the supply of the radio-frequency power, it is determined whether or not plasma is generated within the chamber from one or more parameters reflecting plasma generation within the chamber. When it is determined that plasma is not generated, a frequency of the radio-frequency power output from the radio-frequency power supply is adjusted to set the load side reactance of the radio-frequency power supply to zero or to bring the load side reactance close to zero.

Abstract: In a method of an embodiment, radio-frequency power is supplied to an electrode via a matching device from a radio-frequency power supply in order to generate plasma within a chamber. During the supply of the radio-frequency power, it is determined whether or not plasma is generated within the chamber from one or more parameters reflecting plasma generation within the chamber. When it is determined that plasma is not generated, a frequency of the radio-frequency power output from the radio-frequency power supply is adjusted to set the load side reactance of the radio-frequency power supply to zero or to bring the load side reactance close to zero.

Abstract: At a first timing after mounting a semiconductor wafer W on an electrostatic chuck 38, a susceptor 12 is switched from an electrically grounded state into a floated state. From a second timing after the first timing, a second high frequency power HF for plasma generation is applied to the susceptor 12, and a processing gas is excited into plasma in a chamber 10. From a third timing after the second timing, a first high frequency power LF for ion attraction is applied to the susceptor 12, and a self-bias (?Vdc) is generated. From a fourth timing close to the third timing, a negative second DC voltage ?BDC corresponding to the self-bias (?Vdc) is applied to the susceptor 12. From the fifth timing after the fourth timing, a positive first DC voltage ADC is applied to an inner electrode 42 of the electrostatic chuck 38.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: At a first timing after mounting a semiconductor wafer W on an electrostatic chuck 38, a susceptor 12 is switched from an electrically grounded state into a floated state. From a second timing after the first timing, a second high frequency power HF for plasma generation is applied to the susceptor 12, and a processing gas is excited into plasma in a chamber 10. From a third timing after the second timing, a first high frequency power LF for ion attraction is applied to the susceptor 12, and a self-bias (?Vdc) is generated. From a fourth timing close to the third timing, a negative second DC voltage ?BDC corresponding to the self-bias (?Vdc) is applied to the susceptor 12. From the fifth timing after the fourth timing, a positive first DC voltage ADC is applied to an inner electrode 42 of the electrostatic chuck 38.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., ?400 to ?600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.

Abstract: A plasma processing method in which plasma can be ignited stably with a low radio frequency power and a low gas pressure even after long time operation by applying a DC voltage of ?0.5 kV, for example, from a DC power supply (118) to a lower electrode (104) before a radio frequency power is applied from a radio frequency power supply (114) to the lower electrode (104) through a matching unit 112 when the surface of a wafer W mounted on the lower electrode (104) disposed in a processing container (102) is subjected to a specified plasma processing with plasma of a processing gas formed by applying a radio frequency power to the processing gas introduced into the airtight processing container (102).

Abstract: A plasma processing method in which plasma can be ignited stably with a low radio frequency power and a low gas pressure even after long time operation by applying a DC voltage of ?0.5 kV, for example, from a DC power supply (118) to a lower electrode (104) before a radio frequency power is applied from a radio frequency power supply (114) to the lower electrode (104) through a matching unit 112 when the surface of a wafer W mounted on the lower electrode (104) disposed in a processing container (102) is subjected to a specified plasma processing with plasma of a processing gas formed by applying a radio frequency power to the processing gas introduced into the airtight processing container (102).

Abstract: An etching chamber 1 incorporates a focus ring 9 so as to surround a semiconductor wafer W provided on a lower electrode 4. The plasma processor is provided with an electric potential control DC power supply 33 to control the electric potential of this focus ring 9, and so constituted that the lower electrode 4 is supplied with a DC voltage of, e.g., −400 to −600 V to control the electric potential of the focus ring 9. This constitution prevents surface arcing from developing along the surface of a substrate to be processed.