Patents by Inventor Tadashi Hoshi

Tadashi Hoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8378741
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: February 19, 2013
    Assignee: Renesas Electronics Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20120025905
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Application
    Filed: October 4, 2011
    Publication date: February 2, 2012
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 8049556
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 1, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20100164610
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Application
    Filed: March 5, 2010
    Publication date: July 1, 2010
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto
  • Patent number: 7705668
    Abstract: A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: April 27, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20090096513
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Application
    Filed: December 9, 2008
    Publication date: April 16, 2009
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 7479823
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 20, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 7468627
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: December 23, 2008
    Assignee: Renesas Technology Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 7468626
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: December 23, 2008
    Assignee: Renesas Technology Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20060226894
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 12, 2006
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20060226895
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 12, 2006
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 7078959
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: July 18, 2006
    Assignee: Renesas Technology Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20060132228
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path between an elected circuit block and a branch point at which the signal path branches into different branch paths so as to connect to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission from the elected circuit block to the other circuit blocks, and includes a storage unit for storing a signal right before the power cut-off.
    Type: Application
    Filed: January 27, 2006
    Publication date: June 22, 2006
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20050104653
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Application
    Filed: December 20, 2004
    Publication date: May 19, 2005
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 6853239
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: February 8, 2005
    Assignee: Renesas Technology Corporation
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20040027173
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Application
    Filed: August 5, 2003
    Publication date: February 12, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Patent number: 6639454
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the elected circuit block to other circuit blocks, wherein a single output of the interblock interface circuit is branched out to other circuit blocks. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes a storage unit for storing a signal right before the power cut.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: October 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama
  • Publication number: 20030052730
    Abstract: A semiconductor integrated circuit is provided including a plurality of circuit blocks and adapted to cut off supply of power source voltage to any optional one of the circuit blocks. The integrated circuit includes an interblock interface circuit provided on a signal path from the optional circuit block to other circuit blocks and provided before its signal being branched thereto. The interblock interface circuit includes a signal gate for preventing signal transmission to other circuit blocks and includes storage unit for storing a signal right before the power cut.
    Type: Application
    Filed: February 25, 2002
    Publication date: March 20, 2003
    Inventors: Tadashi Hoshi, Kenji Hirose, Hideaki Abe, Junichi Nishimoto, Midori Nagayama