Patents by Inventor Tadashi Konno

Tadashi Konno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240083996
    Abstract: For example, therapeutic methods and the like for novel IL-8-related diseases using an IL-8 signal inhibitor are provided. Alternatively, for example, therapeutic methods and the like for known or novel IL-8-related diseases using a novel anti-IL-8 antibody are provided.
    Type: Application
    Filed: August 16, 2023
    Publication date: March 14, 2024
    Inventors: Ayako KAKIUCHI, Atsuhiko Kato, Shuji Hayashi, Izumi Yanagisawa, Ryo Konno, Sachiho Netsu, Tadashi Sankai
  • Patent number: 11924938
    Abstract: An illuminator includes: a light emitter including a light-emitting diode; a temperature sensor configured to detect a current temperature of the light emitter; and an illumination controller configured to adjust a drive voltage being supplied to the light emitter in accordance with the current temperature. The illumination controller includes a reference temperature storage in which a reference temperature is stored in advance and is configured to adjust the drive voltage by detecting the current temperature from the temperature sensor on a constant time cycle and comparing the current temperature with the reference temperature.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: March 5, 2024
    Assignee: MITUTOYO CORPORATION
    Inventors: Tadashi Yamazaki, Yuto Konno, Hideki Morita, Nobuya Kaneko, Satoru Hirasawa
  • Patent number: 6986119
    Abstract: A method of forming a tree structure type circuit includes the steps of dividing a division target region of LSI into a plurality of regions, placing constituent elements as distribution targets in the regions, forming a tree, conducting schematic routing, and conducting timing improvement while considering a clock skew. These processings are repeated by a preset number of times. If the repetition number reaches a specified number, the constituent elements and an added buffer or the like are subjected to detailed placement, and automatic routing is conducted.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: January 10, 2006
    Assignee: Fujitsu Limited
    Inventors: Tadashi Konno, Masahiro Sano, Makoto Saito
  • Publication number: 20030233627
    Abstract: A method of forming a tree structure type circuit includes the steps of dividing a division target region of LSI into a plurality of regions, placing constituent elements as distribution targets in the regions, forming a tree, conducting schematic routing, and conducting timing improvement while considering a clock skew. These processings are repeated by a preset number of times. If the repetition number reaches a specified number, the constituent elements and an added buffer or the like are subjected to detailed placement, and automatic routing is conducted.
    Type: Application
    Filed: June 13, 2003
    Publication date: December 18, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Tadashi Konno, Masahiro Sano, Makoto Saito
  • Publication number: 20030229871
    Abstract: An STA script input section receives input of an STA script that includes a clock information and a path disconnection information. A path permissible delay time calculator extracts paths that do not have the disconnection information, and calculates a permissible delay time from a starting point to an ending point of each of the paths. A CCS preparing section prepares the timing constraint model of the compatible constraint set that describes the timing constraints of each path, and the disconnection information, for a plurality of groups of information to have no contradiction between the paths extracted and the disconnection information. Finally, a CCS combining unit obtains one compatible constraint set that takes into account operation modes by simply combining the compatible constraint sets output from the CCS preparing section.
    Type: Application
    Filed: June 4, 2003
    Publication date: December 11, 2003
    Applicant: FUJITSU LIMITED of Kawasaki, Japan
    Inventors: Tatsuya Nakae, Tadashi Konno
  • Patent number: 6434728
    Abstract: An activation path simulation equipment and an activation path simulation method in accordance with the present invention divides a transistor circuit into a plurality of blocks with reference to pn junction nodes of the transistors included therein, and activation patterns are determined for each block using the characteristics of each transistor so as to efficiently create activation patterns of the transistor circuit. In this way, the number of activation patterns to be created can be decreased without creating unnecessary activation patterns, therefore the number of times of simulation can be decreased, which means that simulation speed increases.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: August 13, 2002
    Assignee: Fujitsu Limited
    Inventors: Masashi Arayama, Eiji Furuta, Tadashi Konno
  • Patent number: 6240541
    Abstract: A circuit designing apparatus of an interactive type which enables a simplified and highspeed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
    Type: Grant
    Filed: January 11, 1999
    Date of Patent: May 29, 2001
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Yasuda, Hiroyuki Sugiyama, Noriyuki Ito, Ryoichi Yamashita, Tadashi Konno, Yasunori Abe, Naomi Bizen, Terunobu Maruyama, Yoshiyuki Kato, Tomoyuki Isomura, Hiroshi Ikeda, Miki Takagi
  • Patent number: 6226778
    Abstract: A circuit element placement method and apparatus in which circuit elements can surely be placed in a short time even if a circuit scale is increased. For this purpose, there is sequentially executed a first step of determining placement coordinates of sequential logic circuit elements among many circuit elements to be placed and a second step of determining placement coordinates of circuit elements other than the sequential logic circuit elements with consideration given to the placement coordinates of the sequential logic circuit elements, determined in the first step. The method and apparatus are applicable at a time of design of an integrated circuit such as LSI, or a circuit on a printed wiring board.
    Type: Grant
    Filed: July 16, 1997
    Date of Patent: May 1, 2001
    Assignee: Fujitsu Limited
    Inventors: Tadashi Konno, Keiko Ohsawa, Terunobu Maruyama
  • Patent number: 5889677
    Abstract: A circuit designing apparatus of an interactive type which enables a simplified and high-speed circuit design process while largely reducing a burden on a designer, having a speed analyzing unit for conducting a delay computation for each wiring path on a circuit to be designed and a display control unit for displaying a result of the delay computation by the speed analyzing unit on a display unit. When the speed analyzing unit conducts a delay computation, a delay value of each logic component forming the circuit that is an object of the design is set and altered according to a dullness of a signal waveform inputted to the logic component. The circuit designing apparatus of an interactive type may be applied to a system for conducting a circuit design of an integrated circuit such as an LSI or the like or a printed circuit board.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: March 30, 1999
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Yasuda, Hiroyuki Sugiyama, Noriyuki Ito, Ryoichi Yamashita, Tadashi Konno, Yasunori Abe, Naomi Bizen, Terunobu Maruyama, Yoshiyuki Kato, Tomoyuki Isomura, Hiroshi Ikeda, Miki Takagi
  • Patent number: 5791190
    Abstract: A counter gear mechanism having a large gear coaxially engaged to a small gear. The large gear comprises a disk-like portion and a circumferentially extending portion continuously extending on a peripheral portion of the disk-like portion. The circumferentially extending portion has a circumferential outer surface on which first gear teeth are provided. The small gear comprises a disk-like plate and a body being cylindrically shaped to have a circumferential outer surface on which second gear teeth are provided. A tubular member, provided at a center of the disk-like portion, defines a hole and extends along a rotational axis around which the large gear rotates. At least one recessed portion, formed in the disk-like portion, extends in a circumferential direction relative to the rotational axis. At least one projection is fixed to the disk-like plate of the small gear on an opposite side to the side on which the body is provided.
    Type: Grant
    Filed: August 8, 1996
    Date of Patent: August 11, 1998
    Assignee: Nikko Co., Ltd.
    Inventor: Tadashi Konno
  • Patent number: 5663778
    Abstract: A liquid crystal device comprises a pair of substrates each having an electrode on one side thereof and a liquid crystal layer filled in a space between the paired substrates wherein the paired substrates, respectively, have, on a side contacting the liquid crystal layer, a pattern embossed layer which is made of a material having a refractive index relative to an ordinary ray substantially equal to that of a liquid crystal in the liquid crystal layer. The pattern embossed layers of the respective substrates are so arranged as being fitted with each other when contacted with each other. The method for making such a device as set out above is also described along with a liquid crystal device having irregularities formed on a pair of substrates. The irregularities are made of a material whose dielectric constant is substantially equal to that of the liquid crystal substance used.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: September 2, 1997
    Assignee: Alps Electric Co., Ltd.
    Inventors: Tadashi Konno, Guo Ping Chen
  • Patent number: 4617002
    Abstract: A wireless-controllable toy car with a winch mechanism is disclosed which is provided, in addition to driving wheels and the winch mechanism, with an electric motor for driving and controlling the wheels, another electric motor for controlling the winch mechanism, and a change-over switch for switching a power circuit for the electric motors.
    Type: Grant
    Filed: November 22, 1985
    Date of Patent: October 14, 1986
    Assignee: Nikko Co., Ltd.
    Inventors: Zenichi Ishimoto, Tadashi Konno