Abstract: A semiconductor circuit manufacturing apparatus wherein a wafer has a plurality of zones to be exposed one by one to a pattern of a mask, including detector apparatus for detecting a relative position between the mask and a said zone to be exposed and producing outputs representative of the relative position; a device for exposing the said zone to the mask pattern after they are aligned; a device for producing information for identifying said zone which is going to be exposed; a selector, responsive to said information producing device, for selecting all or a part of the outputs of said detecting apparatus; and a device for determining, on the basis of the selected outputs of said detecting apparatus, a positional deviation between the mask pattern and the zone to be exposed thereto.

Abstract: A mask aligner for aligning a wafer with a mask and exposing the wafer to an image of the mask, includes an illumination source for illuminating the mask, plural devices for executing plural functions of the aligner, a controller for controlling operation of the apparatus in accordance with a predetermined routine, a detector for automatically detecting a malfunction, a memory of plural routines for disposing of one kind of malfunction; a selector for manually selecting one of the routines; and another controller for controlling the apparatus in accordance with the selected routine, when the detector detects a malfunction.

Abstract: A mask aligner for stepping and exposing a wafer in accordance with a shot arrangement, including an input device to which wafer dimension, chip dimension and a chip pattern for one shot are inputted, a selector for selecting a shot arrangement mode from plural shot arrangement modes based on the above input signals, a controller for effecting the shots in accordance with the selected modes to minimize the time required for exposing the one entire wafer or to maximize the number of chips exposed per unit.