Patents by Inventor Tadashi Munakata
Tadashi Munakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9805980Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: January 13, 2016Date of Patent: October 31, 2017Assignee: Renesas Electronics CorporationInventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20160133521Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: January 13, 2016Publication date: May 12, 2016Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamagushi, Noriyuki Takahashi
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Publication number: 20150004755Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: September 18, 2014Publication date: January 1, 2015Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 8877613Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: September 30, 2010Date of Patent: November 4, 2014Assignees: Renesas Electronics Corporation, Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 8083048Abstract: A footstep guide rail (3) (rail body 3a) is arranged so that a level H of a horizontal surface is set at the position obtained by adding a designated offset ? to a tangential line L of a drive sprocket (9) and the footstep guide rail (3) is provided, at its one end on an introductory side of the drive sprocket (9), with a curved part (13). At a reference position closest to the drive sprocket (9), the horizontal surface of the footstep guide rail (3) is changed to the curved part (13). Consequently, it is possible to absorb velocity unevenness of one footstep roller approaching the drive sprocket (9).Type: GrantFiled: December 1, 2006Date of Patent: December 27, 2011Assignee: Toshiba Elevator Kabushiki KaishaInventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hitoshi Kawamoto, Kenichi Fujii, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Publication number: 20110020984Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: September 30, 2010Publication date: January 27, 2011Inventors: Tadashi MUNAKATA, Shingo OOSAKA, Mitsuru KINOSHITA, Yoshihiko YAMAGUCHI, Noriyuki TAKAHASHI
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Patent number: 7816185Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: August 3, 2009Date of Patent: October 19, 2010Assignees: Renesas Electronics Corporation, Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20090291529Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: August 3, 2009Publication date: November 26, 2009Inventors: TADASHI MUNAKATA, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 7579216Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: May 12, 2008Date of Patent: August 25, 2009Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20080286902Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: May 12, 2008Publication date: November 20, 2008Inventors: Tadashi MUNAKATA, Shingo OOSAKA, Mitsuru KINOSHITA, Yoshihiko YAMAGUCHI, Noriyuki TAKAHASHI
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Patent number: 7401691Abstract: A mountainous or valley-shaped curved part 13 is provided in a part of a footstep guide rail 3 for guiding a movement of footstep rollers 5 linked by a footstep chain 7, the part being positioned in the vicinity of a drive sprocket 9. Consequently, owing to meshing of the footstep rollers 5 with the drive sprocket 9, an unevenness in velocity of the footstep rollers 5 is absorbed by the curved part 13, so that a moving velocity of the footstep rollers 5 moving on the downstream of the curved part 13 is maintained constantly, suppressing vibrating of the footsteps 4.Type: GrantFiled: February 28, 2003Date of Patent: July 22, 2008Assignee: Toshiba Elevator Kabushiki KaishaInventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hitoshi Kawamoto, Kenichi Fujii, Tomohiko Matsuura, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Patent number: 7384820Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: February 24, 2006Date of Patent: June 10, 2008Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20070235285Abstract: A footstep guide rail (3) (rail body 3a) is arranged so that a level H of a horizontal surface is set at the position obtained by adding a designated offset ? to a tangential line L of a drive sprocket (9) and the footstep guide rail (3) is provided, at its one end on an introductory side of the drive sprocket (9), with a curved part (13). At a reference position closest to the drive sprocket (9), the horizontal surface of the footstep guide rail (3) is changed to the curved part (13). Consequently, it is possible to absorb velocity unevenness of one footstep roller approaching the drive sprocket (9).Type: ApplicationFiled: April 12, 2006Publication date: October 11, 2007Inventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hitoshi Kawamoto, Kenichi Fujii, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Publication number: 20070235284Abstract: A footstep guide rail (3) (rail body 3a) is arranged so that a level H of a horizontal surface is set at the position obtained by adding a designated offset 6 to a tangential line L of a drive sprocket (9) and the footstep guide rail (3) is provided, at its one end on an introductory side of the drive sprocket (9), with a curved part (13). At a reference position closest to the drive sprocket (9), the horizontal surface of the footstep guide rail (3) is changed to the curved part (13). Consequently, it is possible to absorb velocity unevenness of one footstep roller approaching the drive sprocket (9).Type: ApplicationFiled: December 1, 2006Publication date: October 11, 2007Inventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hitoshi Kawamoto, Kenichi Fujii, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Publication number: 20070007106Abstract: A mountainous or valley-shaped curved part 13 is provided in a part of a footstep guide rail 3 for guiding a movement of footstep rollers 5 linked by a footstep chain 7, the part being positioned in the vicinity of a drive sprocket 9. Consequently, owing to meshing of the footstep rollers 5 with the drive sprocket 9, an unevenness in velocity of the footstep rollers 5 is absorbed by the curved part 13, so that a moving velocity of the footstep rollers 5 moving on the downstream of the curved part 13 is maintained constantly, suppressing vibrating of the footsteps 4.Type: ApplicationFiled: February 28, 2003Publication date: January 11, 2007Applicant: TOSHIBA ELEVATOR KABUSHIKI KAISHAInventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hiroshi Kawamoto, Kenichi Fujii, Tomohiko Matsuura, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Publication number: 20060141677Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: February 24, 2006Publication date: June 29, 2006Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20060108196Abstract: A mountainous or valley-shaped curved part 13 is provided in a part of a footstep guide rail 3 for guiding a movement of footstep rollers 5 linked by a footstep chain 7, the part being positioned in the vicinity of a drive sprocket 9. Consequently, owing to meshing of the footstep rollers 5 with the drive sprocket 9, an unevenness in velocity of the footstep rollers 5 is absorbed by the curved part 13, so that a moving velocity of the footstep rollers 5 moving on the downstream of the curved part 13 is maintained constantly, suppressing vibrating of the footsteps 4.Type: ApplicationFiled: September 12, 2005Publication date: May 25, 2006Applicant: Toshiba Elevator Kabushiki KaishaInventors: Yoshinobu Ishikawa, Tadashi Munakata, Yoshio Ogimura, Nobuhiko Teshima, Shigeo Nakagaki, Hitoshi Kawamoto, Kenichi Fujii, Tomohiko Matsuura, Yoshifumi Ikeda, Kazuhisa Hara, Takayuki Kikuchi
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Patent number: 7033857Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: GrantFiled: June 17, 2003Date of Patent: April 25, 2006Assignees: Renesas Technology Corp., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Publication number: 20040038510Abstract: A semiconductor device manufacturing method comprising the steps of providing a matrix substrate having a main surface with plural device areas formed thereon, fixing plural semiconductor chips to the plural device areas respectively, then sealing the plural semiconductor chips all together with resin to form a block sealing member, dividing the block sealing member and the matrix substrate for each of the device areas by dicing, thereafter rubbing a surface of each of the diced sealing member portions with a brush, then storing semiconductor devices formed by the dicing once into pockets respectively of a tray, and conveying the semiconductor devices each individually from the tray. Since the substrate dividing work after block molding is performed by dicing while vacuum-chucking the surface of the block sealing member, the substrate division can be done without imposing any stress on an external terminal mounting surface of the matrix substrate.Type: ApplicationFiled: June 17, 2003Publication date: February 26, 2004Applicants: Hitachi, Ltd., Renesas Northern Japan Semiconductor, Inc.Inventors: Tadashi Munakata, Shingo Oosaka, Mitsuru Kinoshita, Yoshihiko Yamaguchi, Noriyuki Takahashi
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Patent number: 6491136Abstract: An elevator apparatus is provided with an elevator path having a restricted height. Under a roping ratio of 1:1, a thin driving unit having a traction sheave 1 and a driving mechanism 2 is positioned between an inner wall 3a of the elevator path 3 and a space occupied by an elevator car 4 rising and falling in the elevator path 3. One end of a suspension rope 7 is fixed to the elevator car 4 in a position below a ceiling 4c of the elevator car 4. With the arrangement, the car 4 can move close to the ceiling 4c of the elevator car 4 effectively. Further, it is possible to reduce respective heights of the elevator path 3 and a building equipped with the elevator apparatus.Type: GrantFiled: March 26, 2001Date of Patent: December 10, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Kiyoshi Kobayashi, Tadashi Munakata, Kosei Kamimura, Yasuyuki Wagatsuma, Hisao Yamamoto, Koji Yajima