Patents by Inventor Tadashi Nagasawa

Tadashi Nagasawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230209708
    Abstract: An organic insulator is produced by cured resin product containing a cyclic olefin copolymer as a main component and has a cumulative luminescence amount measured by chemiluminescence measurement method of 3.7×105 cpm or less. The glass transition temperature of the cured product is from 134° C. to 140° C. The cumulative luminescence amount is from 2.8×105 cpm to 3.2×105 cpm. A wiring board includes an insulation layer and an electrical conductor layer disposed on a surface of the insulation layer, and the insulation layer is the organic insulator described above.
    Type: Application
    Filed: May 24, 2021
    Publication date: June 29, 2023
    Applicant: KYOCERA Corporation
    Inventors: Chie CHIKARA, Tadashi NAGASAWA, Satoshi YOSHIURA, Satoshi KAJITA, Kouji FUJIKAWA
  • Patent number: 11426970
    Abstract: A laminated uncured sheet of the present disclosure has a structure in which resin sheet layers and resin layers are alternately laminated and a through hole penetrating in the laminating direction is formed, wherein the resin sheet layers are formed with a thermosetting resin composition containing a thermosetting resin as a main component, the resin layers are formed with a thermoplastic resin composition containing a thermoplastic resin, and the thermoplastic resin composition is adhered to the inner wall surface of the resin sheet layer part in the through hole.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: August 30, 2022
    Assignee: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Satoshi Yoshiura, Chie Chikara, Satoshi Kajita, Yasuhide Tami
  • Publication number: 20210400809
    Abstract: A wiring board includes an insulating layer comprising organic resin with inorganic particles, a first metal layer on a first surface, and a second metal layer disposed on a second surface. The insulating layer has a thickness of 75-1000 ?m and a storage modulus of 4 GPa-7 GPa. The first metal layer has a thickness of 1.5-10 ?m and a coverage of 5%-25%. The second metal layer has a thickness of 3-10 ?m or 25-100 ?m and a coverage of 85% or more. A surface part of the insulating layer on the first metal layer side has a higher ratio of organic resin than a surface part of the insulating layer on the second metal layer side.
    Type: Application
    Filed: October 23, 2019
    Publication date: December 23, 2021
    Applicant: KYOCERA Corporation
    Inventors: Tadashi NAGASAWA, Satoshi YOSHIURA
  • Publication number: 20210260847
    Abstract: A laminated uncured sheet of the present disclosure has a structure in which resin sheet layers and resin layers are alternately laminated and a through hole penetrating in the laminating direction is formed, wherein the resin sheet layers are formed with a thermosetting resin composition containing a thermosetting resin as a main component, the resin layers are formed with a thermoplastic resin composition containing a thermoplastic resin, and the thermoplastic resin composition is adhered to the inner wall surface of the resin sheet layer part in the through hole.
    Type: Application
    Filed: June 20, 2019
    Publication date: August 26, 2021
    Applicant: KYOCERA Corporation
    Inventors: Tadashi NAGASAWA, Satoshi YOSHIURA, Chie CHIKARA, Satoshi KAJITA, Yasuhide TAMI
  • Patent number: 10806031
    Abstract: There is provided an organic insulating body which contains a cyclic olefin copolymer as a main component and a peroxide having a benzene ring, and has such a property that a loss tangent peak appears at 120° C. or higher in a dynamic mechanical analysis.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: October 13, 2020
    Assignee: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Chie Chikara, Satoshi Kajita
  • Patent number: 10772198
    Abstract: An organic insulator is composed an organic resin phase as a main component. The organic resin phase includes a weather-resistant stabilizer. The organic resin phase includes an inner region and a surface region formed in at least one surface of the inner region. The surface region has a higher content ratio of the weather-resistance stabilizer than the inner region. A metal-clad laminate includes the organic insulator and a metallic foil laminated on at least one surface of the organic insulator. A wiring board includes a plurality of insulating layers composed of the organic insulator, and a metallic foil disposed between the insulating layers.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: September 8, 2020
    Assignee: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Satoshi Yoshiura, Chie Chikara
  • Publication number: 20200128667
    Abstract: An organic insulator is composed an organic resin phase as a main component. The organic resin phase includes a weather-resistant stabilizer. The organic resin phase includes an inner region and a surface region formed in at least one surface of the inner region. The surface region has a higher content ratio of the weather-resistance stabilizer than the inner region. A metal-clad laminate includes the organic insulator and a metallic foil laminated on at least one surface of the organic insulator. A wiring board includes a plurality of insulating layers composed of the organic insulator, and a metallic foil disposed between the insulating layers.
    Type: Application
    Filed: June 26, 2018
    Publication date: April 23, 2020
    Applicant: KYOCERA Corporation
    Inventors: Tadashi NAGASAWA, Satoshi YOSHIURA, Chie CHIKARA
  • Publication number: 20200077514
    Abstract: There is provided an organic insulating body which contains a cyclic olefin copolymer as a main component and a peroxide having a benzene ring, and has such a property that a loss tangent peak appears at 120° C. or higher in a dynamic mechanical analysis.
    Type: Application
    Filed: July 19, 2017
    Publication date: March 5, 2020
    Applicant: KYOCERA Corporation
    Inventors: Tadashi NAGASAWA, Chie CHIKARA, Satoshi KAJITA
  • Patent number: 9693451
    Abstract: A wiring board (3) according to an embodiment of the present invention includes an inorganic insulating layer (11A); a first resin layer (12A) on one main surface of the inorganic insulating layer (11A); a second resin layer (13A) on another main surface of the inorganic insulating layer (11A); and a conductive layer (8) partially on one main surface of the second resin layer (13A), the one main surface being on an opposite side to the inorganic insulating layer (11A). The inorganic insulating layer (11A) includes a plurality of first inorganic insulating particles (14) which are bound to each other at a part of each of the first inorganic insulating particles and gaps (G) surrounded by the plurality of first inorganic insulating particles (14). A part of the first resin layer (12A) and a part of the second resin layer (13A) are located inside the gaps (G).
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: June 27, 2017
    Assignee: KYOCERA Corporation
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Publication number: 20150037611
    Abstract: A wiring board (3) according to an embodiment of the present invention includes an inorganic insulating layer (11A); a first resin layer (12A) on one main surface of the inorganic insulating layer (11A); a second resin layer (13A) on another main surface of the inorganic insulating layer (11A); and a conductive layer (8) partially on one main surface of the second resin layer (13A), the one main surface being on an opposite side to the inorganic insulating layer (11A). The inorganic insulating layer (11A) includes a plurality of first inorganic insulating particles (14) which are bound to each other at a part of each of the first inorganic insulating particles and gaps (G) surrounded by the plurality of first inorganic insulating particles (14). A part of the first resin layer (12A) and a part of the second resin layer (13A) are located inside the gaps (G).
    Type: Application
    Filed: February 20, 2013
    Publication date: February 5, 2015
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Patent number: 8431832
    Abstract: A circuit board (2) includes an insulation layer (7) where a via conductor (10) is embedded. The via conductor (10) includes: a first conductor portion (10a) having an lower portion narrower than an upper portion; and a second conductor portion (10b) which is formed immediately below the first conductor portion (10a), connected to the first conductor portion (10a), and has a maximum width greater than the upper end width of the first conductor portion (10a). The insulation layer (7) has a plurality of indentations (T1a, T1b) on the surface in contact with the via conductor (10). Convex portions (T2a, T2b) of the via conductor are arranged in the indentations (T1a, T1b).
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: April 30, 2013
    Assignee: Kyocera Corporation
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Patent number: 8338717
    Abstract: A circuit substrate includes a base and conductive layers disposed on lower and upper surfaces of the substrate. The base includes resin layers and the conductive layers overlapping with each other in a plan view. The resin layers include first resin layers and a second resin layer interposed between the first resin layers. The first resin layer has a filler and the second resin layer has no filler or a filler whose amount is 1 volume % or less and smaller than an amount of the filler in the first resin layer.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: December 25, 2012
    Assignee: Kyocera Corporation
    Inventor: Tadashi Nagasawa
  • Patent number: 8129623
    Abstract: The invention relates to a resin film having a high adhesiveness to other materials, an adhesive sheet, a circuit board and an electronic apparatus in which an adhesive layer and the resin film are firmly adhered. A resin film (1) includes a plurality of projected portions (10) each having a filler (9) in an apex portion (10a) and a resin material. The projected portions (10) are formed on at least one surface of a sheet portion (16).
    Type: Grant
    Filed: January 29, 2007
    Date of Patent: March 6, 2012
    Assignee: Kyocera Corporation
    Inventors: Tadashi Nagasawa, Masaharu Shirai, Kenji Kume, Yutaka Tsukada
  • Publication number: 20110051386
    Abstract: A circuit board (2) includes an insulation layer (7) where a via conductor (10) is embedded. The via conductor (10) includes: a first conductor portion (10a) having an lower portion narrower than an upper portion; and a second conductor portion (10b) which is formed immediately below the first conductor portion (10a), connected to the first conductor portion (10a), and has a maximum width greater than the upper end width of the first conductor portion (10a). The insulation layer (7) has a plurality of indentations (T1a, T1b) on the surface in contact with the via conductor (10). Convex portions (T2a, T2b) of the via conductor are arranged in the indentations (T1a, T1b).
    Type: Application
    Filed: November 28, 2008
    Publication date: March 3, 2011
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Katsura Hayashi
  • Publication number: 20110024170
    Abstract: A circuit substrate comprises a base and conductive layers disposed on lower and upper surfaces of the substrate. The base includes resin layers and the conductive layers overlapping with each other in a plan view. The resin layers include first resin layers and a second resin layer interposed between the first resin layers. The first resin layer has a filler and the second resin layer has no filler or a filler whose amount is 1 volume % or less and smaller than an amount of the filler in the first resin layer.
    Type: Application
    Filed: July 28, 2010
    Publication date: February 3, 2011
    Applicant: KYOCERA CORPORATION
    Inventor: Tadashi NAGASAWA
  • Publication number: 20100065318
    Abstract: A circuit board according to an embodiment of the present invention relates to a circuit board 2 including an insulating layer 7 and a via conductor 8 embedded in the insulating layer 7. The via conductor 8 has a narrowed portion 80 inclined with respect to a horizontal direction X.
    Type: Application
    Filed: November 27, 2007
    Publication date: March 18, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Kiyomi Hagihara, Katsura Hayashi
  • Publication number: 20090314526
    Abstract: The invention relates to a resin film having a high adhesiveness to other materials, an adhesive sheet, a circuit board and an electronic apparatus in which an adhesive layer and the resin film are firmly adhered. A resin film (1) includes a plurality of projected portions (10) each having a filler (9) in an apex portion (10a) and a resin material. The projected portions (10) are formed on at least one surface of a sheet portion (16).
    Type: Application
    Filed: January 29, 2007
    Publication date: December 24, 2009
    Applicant: KYOCERA CORPORATION
    Inventors: Tadashi Nagasawa, Masaharu Shirai, Kenji Kume, Yutaka Tsukada
  • Patent number: 6663946
    Abstract: An object of the invention is to satisfy all of a high-density wiring package, soldering thermal resistance, an insulating property and high-frequency transmission characteristics. The invention is a multi-layer wiring substrate having a lamination of a plurality of dielectric layers which are each provided with a wiring conductor made of a metallic foil on at least one of upper and bottom surfaces of the dielectric layer, the wiring conductors between which the dielectric layer is disposed being electrically connected with each other via a through conductor formed in the dielectric layer; on this occasion, the dielectric layers each individually are composed of a liquid crystal polymer layer and cladding layers made of a polyphenyleneether-type organic substance and formed on upper and bottom surfaces of the liquid crystal polymer layer.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: December 16, 2003
    Assignee: Kyocera Corporation
    Inventors: Takuji Seri, Katsura Hayashi, Tadashi Nagasawa, Kenji Kume, Takahiro Matsunaga, Isao Miyatani
  • Publication number: 20020172021
    Abstract: An object of the invention is to satisfy all of a high-density wiring package, soldering thermal resistance, an insulating property and high-frequency transmission characteristics. The invention is a multi-layer wiring substrate having a lamination of a plurality of dielectric layers which are each provided with a wiring conductor made of a metallic foil on at least one of upper and bottom surfaces of the dielectric layer, the wiring conductors between which the dielectric layer is disposed being electrically connected with each other via a through conductor formed in the dielectric layer; on this occasion, the dielectric layers each individually are composed of a liquid crystal polymer layer and cladding layers made of a polyphenyleneether-type organic substance and formed on upper and bottom surfaces of the liquid crystal polymer layer.
    Type: Application
    Filed: February 28, 2002
    Publication date: November 21, 2002
    Inventors: Takuji Seri, Katsura Hayashi, Tadashi Nagasawa, Kenji Kume, Takahiro Matsunaga, Isao Miyatani