Patents by Inventor Tadashi SHIONERI

Tadashi SHIONERI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9805960
    Abstract: When an edge of a wafer passes above a right sensor and a left sensor disposed in a conveyance route of the wafer to a substrate processing chamber, four edge intersecting points are acquired in a first wafer coordinate system, and a reference edge intersecting point set composed of two adjacent edge intersecting points is created from the four edge intersecting points. Between the two remaining edge intersecting points which do not constitute the reference edge intersecting point set, an edge intersecting point present within an area surrounded by two circles defined based on the two edge intersecting points constituting the reference edge intersecting point set is selected as an effective edge intersecting point, and a central position of a circle passing through the reference edge intersecting points and the effective edge intersecting point is acquired as a central position of the wafer.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: October 31, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takehiro Shindo, Tadashi Shioneri, Masahiro Dogome
  • Publication number: 20170011940
    Abstract: When an edge of a wafer passes above a right sensor and a left sensor disposed in a conveyance route of the wafer to a substrate processing chamber, four edge intersecting points are acquired in a first wafer coordinate system, and a reference edge intersecting point set composed of two adjacent edge intersecting points is created from the four edge intersecting points. Between the two remaining edge intersecting points which do not constitute the reference edge intersecting point set, an edge intersecting point present within an area surrounded by two circles defined based on the two edge intersecting points constituting the reference edge intersecting point set is selected as an effective edge intersecting point, and a central position of a circle passing through the reference edge intersecting points and the effective edge intersecting point is acquired as a central position of the wafer.
    Type: Application
    Filed: July 6, 2016
    Publication date: January 12, 2017
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Takehiro SHINDO, Tadashi SHIONERI, Masahiro DOGOME