Patents by Inventor Tadashi Umezawa
Tadashi Umezawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160199307Abstract: A coating agent containing 1% to 7% by mass of hydroxyalkyl cellulose, relative to the total mass of the coating agent, in which the amount of a hydroxyalkyl group, relative to the total mall of the hydroxyalkyl cellulose, is more than 50% to 60% by mass, is obtained. A solid formulation is obtained by spraying the coating agent onto a plane tablet.Type: ApplicationFiled: June 13, 2014Publication date: July 14, 2016Applicant: NIPPON SODA CO., LTD.Inventors: Tadashi UMEZAWA, Takeshi SHIMOTORI, Shinichiro TSUE
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Patent number: 8137571Abstract: Embodiments of the present invention help to provide a method for manufacturing a perpendicular magnetic recording head including a main magnetic pole having a width that does not generally vary. According to one embodiment, a magnetic film, a first inorganic mask film, an organic film, a second inorganic mask film, and a resist pattern are formed in this order. Reactive ion etching (RIE) is performed using the resist pattern as a mask to etch the second inorganic mask film and the organic film and form a mask for the subsequent step. A flow rate of an Ar gas is then controlled, and ion milling is performed, to correct a difference between the width of the mask located at the central portion of the wafer and the width of the mask located at the outer peripheral portion of the wafer. The magnetic film is processed to have a uniform track width. Ion milling is then performed to form the main magnetic pole having an inverted trapezoidal shape.Type: GrantFiled: March 17, 2009Date of Patent: March 20, 2012Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Tomohiro Okada, Hisashi Kimura, Taku Shintani, Tadashi Umezawa
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Publication number: 20090236307Abstract: Embodiments of the present invention help to provide a method for manufacturing a perpendicular magnetic recording head including a main magnetic pole having a width that does not generally vary. According to one embodiment, a magnetic film, a first inorganic mask film, an organic film, a second inorganic mask film, and a resist pattern are formed in this order. Reactive ion etching (RIE) is performed using the resist pattern as a mask to etch the second inorganic mask film and the organic film and form a mask for the subsequent step. A flow rate of an Ar gas is then controlled, and ion milling is performed, to correct a difference between the width of the mask located at the central portion of the wafer and the width of the mask located at the outer peripheral portion of the wafer. The magnetic film is processed to have a uniform track width. Ion milling is then performed to form the main magnetic pole having an inverted trapezoidal shape.Type: ApplicationFiled: March 17, 2009Publication date: September 24, 2009Inventors: Tomohiro Okada, Hisashi Kimura, Taku Shintani, Tadashi Umezawa
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Patent number: 7259104Abstract: A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.Type: GrantFiled: September 29, 2003Date of Patent: August 21, 2007Assignee: Hitachi, Ltd.Inventors: Tetsuo Ono, Takafumi Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
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Patent number: 7223884Abstract: A process by which high-quality crystals of methionine in the form of granules or thick plates having high bulk density can be stably produced. The process for production of methionine comprises the step of hydrolyzing 5-(2-methylmercaptoethyl)hydantoin into a metal salt of methionine by the use of at least one metal compound selected from the group consisting of metal hydroxides, metal carbonates, and metal bicarbonates, the step of neutralizing the metal salt of methionine under pressurizing with carbon dioxide to crystallize methionine, the step of separating the resulting mixture into methionine and a filtrate, and the step of recycling the filtrate to the step of hydrolysis of 5-(2-methylmercaptoethyl)-hydantoin, wherein the content of methionine polymers and/or salts thereof in the aqueous solution used in the crystallization step in terms of methionine polymers is adjusted to 8 wt % or below based on the amount of methionine to be formed.Type: GrantFiled: November 28, 2002Date of Patent: May 29, 2007Assignee: Nippon Soda Co., Ltd.Inventors: Toru Kawabe, Toshimichi Okubo, Tadashi Umezawa, Masayuki Sato, Takeomi Koga
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Publication number: 20040267049Abstract: A process by which high-quality crystals of methionine in the form of granules or thick plates having high bulk density can be stably produced. The process for production of methionine comprises the step of hydrolyzing 5-(2-methylmercaptoethyl)hydantoin into a metal salt of methionine by the use of at least one metal compound selected from the group consisting of metal hydroxides, metal carbonates, and metal bicarbonates, the step of neutralizing the metal salt of methionine under pressurizing with carbon dioxide to crystallize methionine, the step of separating the resulting mixture into methionine and a filtrate, and the step of recycling the filtrate to the step of hydrolysis of 5-(2-methylmercaptoethyl)-hydantoin, wherein the content of methionine polymers and/or salts thereof in the aqueous solution used in the crystallization step in terms of methionine polymers is adjusted to 8 wt % or below based on the amount of methionine to be formed.Type: ApplicationFiled: April 27, 2004Publication date: December 30, 2004Inventors: Toru Kawabe, Toshimichi Okubo, Tadashi Umezawa, Masayuki Sato, Takeomi Koga
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Publication number: 20040058541Abstract: To meet the requirements for ever smaller semiconductor devices, it is required to provide a sample surface processing method which is capable of processing a device of 1 micron or less, or more preferably 0.5 micron or less. It is also required to provide a surface processing method which allows a flat surface to be etched without irregularities occurring on the etched surface, and permits the multilayer film to be etched without underlying oxide film etched through.Type: ApplicationFiled: September 29, 2003Publication date: March 25, 2004Inventors: Tetsuo Ono, Takafuml Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
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Patent number: 6686619Abstract: A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.Type: GrantFiled: May 3, 2002Date of Patent: February 3, 2004Assignee: Hitachi, Ltd.Inventors: Yoshitaka Nakamura, Hideo Aoki, Yoshikazu Ohira, Tadashi Umezawa, Satoru Yamada, Keizou Kawakita, Isamu Asano, Naoki Fukuda, Tsuyoshi Tamaru, Hidekazu Goto, Nobuyoshi Kobayashi
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Patent number: 6660647Abstract: A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.Type: GrantFiled: January 11, 2001Date of Patent: December 9, 2003Assignee: Hitachi, Ltd.Inventors: Tetsuo Ono, Takafumi Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
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Publication number: 20030211673Abstract: A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.Type: ApplicationFiled: June 6, 2003Publication date: November 13, 2003Inventors: Yoshitaka Nakamura, Hideo Aoki, Yoshikazu Ohira, Tadashi Umezawa, Satoru Yamada, Keizou Kawakita, Isamu Asano, Naoki Fukuda, Tsuyoshi Tamaru, Hidekazu Goto, Nobuyoshi Kobayashi
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Publication number: 20030045113Abstract: A fabrication method of a semiconductor integrated circuit device using a gas mixture comprising SF6, oxygen and nitrogen as a plasma source gas upon dry etching of a W film, a WNx film and a polycrystal silicon film as a gate electrode material by using a silicon nitride film as a mask, the fabrication method capable of ensuring the shape of the gate electrode upon etching fabrication of a gate electrode of a polymetal structure and improving the etching selectivity to the etching stopper film comprising silicon nitride.Type: ApplicationFiled: July 19, 2002Publication date: March 6, 2003Applicant: Hitachi, Ltd.Inventors: Hiroyuki Enomoto, Hiroshi Kawakami, Tadashi Umezawa, Kazutami Tago
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Publication number: 20020123190Abstract: A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.Type: ApplicationFiled: May 3, 2002Publication date: September 5, 2002Inventors: Yoshitaka Nakamura, Hideo Aoki, Yoshikazu Ohira, Tadashi Umezawa, Satoru Yamada, Keizou Kawakita, Isamu Asano, Naoki Fukuda, Tsuyoshi Tamaru, Hidekazu Goto, Nobuyoshi Kobayashi
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Publication number: 20020047153Abstract: A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.Type: ApplicationFiled: October 30, 2001Publication date: April 25, 2002Inventors: Yoshitaka Nakamura, Hideo Aoki, Yoshikazu Ohira, Tadashi Umezawa, Satoru Yamada, Keizou Kawakita, Isamu Asano, Naoki Fukuda, Tsuyoshi Tamaru, Hidekazu Goto, Nobuyoshi Kobayashi
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Patent number: 6329681Abstract: A semiconductor integrated circuit device and a method of manufacturing such a device provides the advantages that undulations are prevented from being produced in the polycrystal silicon plugs in the bit line contact holes and that the undesired phenomenon of transversally etching the silicide film at the contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines BL formed at the time of forming a first wiring layer 18 is made of a laminate film having a titanium film 18a, a titanium nitride film 18b and a tungsten film 18c and a titanium silicide film 20 containing nitrogen or oxygen is formed in the contact areas of the bit lines BL and the plugs 19. A titanium silicide film 20 containing nitrogen or oxygen is also formed in the contact areas of the first wiring layer 18 and the semiconductor substrate 1.Type: GrantFiled: December 18, 1998Date of Patent: December 11, 2001Inventors: Yoshitaka Nakamura, Hideo Aoki, Yoshikazu Ohira, Tadashi Umezawa, Satoru Yamada, Keizou Kawakita, Isamu Asano, Naoki Fukuda, Tsuyoshi Tamaru, Hidekazu Goto, Nobuyoshi Kobayashi
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Patent number: 6235620Abstract: Described is a process for manufacturing a semiconductor integrated circuit device, to expose semiconductor regions over the surface of a semiconductor substrate in self-alignment to wiring lines (including gate electrodes) and element isolating regions when forming connection holes. The process includes a first step of coating a semiconductor substrate with a first conductive film, a first insulating film and a second insulating film sequentially, and patterning these films to form first conductive film patterns. A third insulating film is then formed over the semiconductor substrate, on the side walls of the first conductive film patterns and over the second insulating film, and a fourth insulating film is formed over the third insulating film.Type: GrantFiled: August 24, 1999Date of Patent: May 22, 2001Assignee: Hitachi, Ltd.Inventors: Masayoshi Saito, Makoto Yoshida, Hiroshi Kawakami, Tadashi Umezawa
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Patent number: 6191045Abstract: In order to provide a method of treating a multilayer including metal and polysilicon for use in a conductor or a gate electrode of a semiconductor device with high accuracy at a high selectivity, the temperature of a sample is maintained at 100° C. or higher at the time of etching a metal film to increase the etch rate of the metal film. In order to suppress the etch rate of a polysilicon film and prevent side etching, an oxygen gas is added to a gas containing a halogen element. In order to suppress the etch rate of a silicon oxide film at the time of etching the polysilicon film, the etching is performed with etch parameters which are divided into those for the metal film and those for the polysilicon film. In the etching performed to the multilayer containing metal and polysilicon, by etching the metal film at a high temperature of 100° C. or higher, the etch rate of the metal film becomes high. Consequently, there is no partial etch residue of the metal film and a barrier film.Type: GrantFiled: April 30, 1999Date of Patent: February 20, 2001Assignee: Hitachi, Ltd.Inventors: Motohiko Yoshigai, Hiroshi Hasegawa, Hiroshi Akiyama, Takafumi Tokunaga, Tadashi Umezawa, Masayuki Kojima, Kazuo Nojiri, Hiroshi Kawakami, Kunihiko Katou
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Patent number: 5784484Abstract: A pattern inspecting device and associated inspection method are provided that appropriately adjust inspection resolution in accordance with the quality of printed boards under inspection, thereby enabling a reduction of the inspection time. The pattern inspecting device of the present invention is made up of a confirmation station and an optical inspection device section 1 that includes an image signal processor 3, an image analyzer 4, an inspection result processor 5, a CCD camera 6, a pair of illumination lamps 7, and an inspection table 8. The image signal processor 3 A/D converts the image data outputted by the camera, converts this signal to binary, and then to a digital image signal. The image analyzer 4 compares the digital image signal outputted by the image signal processor 3 with standard inspection data and outputs inspection results.Type: GrantFiled: April 1, 1996Date of Patent: July 21, 1998Assignee: NEC CorporationInventor: Tadashi Umezawa
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Patent number: 4386844Abstract: A two cycle electrophotographic copying apparatus includes an operatively rotatable photosensitive body, an electric charging device, a cleaning lamp disposed upstream of the charging device, and a neutralizing electrode disposed downstream of the charging device. This novel arrangement of the cleaning lamp and neutralizing electrode results in a significantly reduced occurrence of toner contamination by residual electric field attraction to operating and structural portions of the copying apparatus which are positioned about the photosensitive body.Type: GrantFiled: February 19, 1980Date of Patent: June 7, 1983Assignee: Konishiroku Photo Industry Co., Ltd.Inventors: Nin-ichi Kamogawa, Tadashi Umezawa, Masakazu Fukuchi
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Patent number: 4305651Abstract: A system for adjusting the output current of a discharge electrode for electrophotographic copying machines comprising the step of adjusting the output current of the discharge electrode in the electrophotographic copying machine by selecting a selector switch which corresponds to a class of photosensitive members, such that the discharge electrode produces an output current which is suited for the photosensitive members of the class.Type: GrantFiled: February 22, 1980Date of Patent: December 15, 1981Assignee: Konishiroku Photo Industry Co., Ltd.Inventors: Tadashi Umezawa, Seiichi Yagi, Katsuhiro Syukuri