Patents by Inventor Tadashi Uno
Tadashi Uno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10186916Abstract: The rotary machine includes a rotor rotatably provided and a resin-molded stator. The stator includes a stator core, a coil, and a mold portion. A tooth portion in the stator core includes first and second facing portions. The first facing portion includes a first facing surface where an air gap with the rotor becomes a first distance. The second facing portion is integrated with the first facing portion in the circumferential direction centered at the rotation axis of the rotor, and includes a second facing surface where the air gap becomes a second distance wider than the first distance. The second facing portion includes a groove portion on the second facing surface. The mold portion includes a first mold portion. The first mold portion covers the second facing portion, is provided at the groove portion, and includes a third facing surface where the air gap becomes the first distance.Type: GrantFiled: December 13, 2013Date of Patent: January 22, 2019Assignee: TOP CO., LTDInventors: Hiroaki Asakura, Nobuyuki Tanaka, Tadashi Uno, Shingo Yamada
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Patent number: 10075040Abstract: A rotary machine includes a rotor and a resin-molded stator which includes a stator core, a coil, a molded portion, a lead line, a bush and a bush supporting frame. The stator core is formed by laminating steel sheets. The coil is formed by winding a conducting wire around a tooth formed to the stator core. The molded portion covers the coil. The lead line is formed by the conducting wire continuing from an end portion of a power supply side of the coil. The bush is formed with a penetrated insert hole where the lead line is passed through. The bush supporting frame is supported by the molded portion and is formed with a penetrated attaching hole into which the bush is fitted in. The lead line is drawn out to the outside of the molded portion from the attaching hole.Type: GrantFiled: May 16, 2014Date of Patent: September 11, 2018Assignee: Top Co., Ltd.Inventors: Yoshitaka Kakuda, Tadashi Uno
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Publication number: 20160111931Abstract: A rotary machine includes a rotor and a resin-molded stator which includes a stator core, a coil, a molded portion, a lead line, a bush and a bush supporting frame. The stator core is formed by laminating steel sheets. The coil is formed by winding a conducting wire around a tooth formed to the stator core. The molded portion covers the coil. The lead line is formed by the conducting wire continuing from an end portion of a power supply side of the coil. The bush is formed with a penetrated insert hole where the lead line is passed through. The bush supporting frame is supported by the molded portion and is formed with a penetrated attaching hole into which the bush is fitted in. The lead line is drawn out to the outside of the molded portion from the attaching hole.Type: ApplicationFiled: May 16, 2014Publication date: April 21, 2016Applicant: Top Co., Ltd.Inventors: Yoshitaka Kakuda, Tadashi Uno
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Publication number: 20150340914Abstract: The rotary machine includes a rotor rotatably provided and a resin-molded stator. The stator includes a stator core, a coil, and a mold portion. A tooth portion in the stator core includes first and second facing portions. The first facing portion includes a first facing surface where an air gap with the rotor becomes a first distance. The second facing portion is integrated with the first facing portion in the circumferential direction centered at the rotation axis of the rotor, and includes a second facing surface where the air gap becomes a second distance wider than the first distance. The second facing portion includes a groove portion on the second facing surface. The mold portion includes a first mold portion. The first mold portion covers the second facing portion, is provided at the groove portion, and includes a third facing surface where the air gap becomes the first distance.Type: ApplicationFiled: December 13, 2013Publication date: November 26, 2015Applicant: TOP CO., LTD.Inventors: Hiroaki ASAKURA, Nobuyuki TANAKA, Tadashi UNO, Shingo YAMADA
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Patent number: 8105871Abstract: A semiconductor device includes a semiconductor element provided over a wiring board; sealing resin configured to seal the semiconductor element; and reinforcing resin provided at least at a part of a boundary part of the sealing resin and the wiring board. In the above-mentioned semiconductor device, the reinforcing resin may be provided along a perimeter of the boundary part of the sealing resin and the wiring board. The reinforcing resin may be provided at a boundary part of the sealing resin and the wiring board in a vicinity of a corner part of the sealing resin.Type: GrantFiled: December 22, 2006Date of Patent: January 31, 2012Assignee: Fujitsu Semiconductor LimitedInventors: Tadashi Uno, Nobukatsu Saito
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Patent number: 7498052Abstract: A meat modifying agent includes an oil-in-water emulsion containing (A) 10 to 60 parts by weight of an animal fat/oil, (B) 0.01 to 1 part by weight of a starch, (C) 15 to 40 parts by weight of a saccharified starch, (D) 0.3 to 8.0 parts by weight of a non-ionic surfactant, (E) 0.41 to 7.5 parts by weight of a viscosity-increasing polysaccharide, (F) 0.02 to 0.05 parts by weight of an anti-oxidant, (G) 0.03 to 0.1 parts by weight of a metal sequestering agent, (H) 0.005 to 0.5 parts by weight of a pH adjusting agent, (I) a preservative containing 0.00001 to 0.005 parts by weight of thujaplicin, and (J) water.Type: GrantFiled: September 27, 2005Date of Patent: March 3, 2009Assignee: Uno Shoyu Co., Ltd.Inventors: Minoru Uno, Hisashi Uno, Tsutomu Uno, Tadashi Uno, Shigenori Shimizu
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Publication number: 20080042254Abstract: A semiconductor device includes a semiconductor element provided over a wiring board; sealing resin configured to seal the semiconductor element; and reinforcing resin provided at least at a part of a boundary part of the sealing resin and the wiring board. In the above-mentioned semiconductor device, the reinforcing resin may be provided along a perimeter of the boundary part of the sealing resin and the wiring board. The reinforcing resin may be provided at a boundary part of the sealing resin and the wiring board in a vicinity of a corner part of the sealing resin.Type: ApplicationFiled: December 22, 2006Publication date: February 21, 2008Applicant: FUJITSU LIMITEDInventors: Tadashi Uno, Nobukatsu Saito
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Publication number: 20070232056Abstract: It is an object of the present invention to provide a semiconductor device with high performance and reliability, in which peeling off of interconnection layers or conductive layers due to thermal stress developed during packaging of a semiconductor substrate is suppressed, and thus electrical break down is prevented and an efficient method for manufacturing the semiconductor device. The semiconductor device of the present invention is characterized by having a semiconductor substrate, an interconnection layer 12, a first conductive layer 15, an interlayer insulating film 16 and a second conductive layer 17. The method for manufacturing the semiconductor device of the present invention is characterized by containing at least forming an interconnection layer, forming a first conductive layer, forming an interlayer insulating film and forming a second conductive layer so as to be electrically connected to the first conductive layer.Type: ApplicationFiled: August 16, 2006Publication date: October 4, 2007Applicant: FUJITSU LIMITEDInventors: Nobukatsu Saitou, Tadashi Uno, Masashi Kano, Yoshihiro Matsuoka
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Publication number: 20060068077Abstract: A meat modifying agent includes an oil-in-water emulsion containing (A) 10 to 60 parts by weight of an animal fat/oil, (B) 0.01 to 1 part by weight of a starch, (C) 15 to 40 parts by weight of a saccharified starch, (D) 0.3 to 8.0 parts by weight of a non-ionic surfactant, (E) 0.41 to 7.5 parts by weight of a viscosity-increasing polysaccharide, (F) 0.02 to 0.05 parts by weight of an anti-oxidant, (G) 0.03 to 0.1 parts by weight of a metal sequestering agent, (H) 0.005 to 0.5 parts by weight of a pH adjusting agent, (I) a preservative containing 0.00001 to 0.005 parts by weight of thujaplicin, and (J) water.Type: ApplicationFiled: September 27, 2005Publication date: March 30, 2006Inventors: Minoru Uno, Hisashi Uno, Tsutomu Uno, Tadashi Uno, Shigenori Shimizu
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Patent number: 6960827Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.Type: GrantFiled: April 6, 2004Date of Patent: November 1, 2005Assignee: Fujitsu LimitedInventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
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Publication number: 20040188855Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.Type: ApplicationFiled: April 6, 2004Publication date: September 30, 2004Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
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Patent number: 6781241Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.Type: GrantFiled: October 17, 2002Date of Patent: August 24, 2004Assignee: Fujitsu LimitedInventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
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Publication number: 20030197260Abstract: A stacked-type semiconductor device has a reduced overall height and an improved reliability in the mechanical strength of the stacked structure. The semiconductor device also has an improved heat release characteristic. A first interposer has a surface on which first electrode pads are formed and a first semiconductor element is mounted with a circuit forming surface facing the first interposer. A second interposer has a surface on which second electrode pads are formed and a second semiconductor element is mounted with a circuit forming surface facing the second interposer. External connection terminals are provided on a surface of the second interposer opposite to the surface on which the second semiconductor element is mounted. The first and second interposers are electrically connected to each other by conductive members provided therebetween. A back surface of the first semiconductor element and a back surface of the second semiconductor element are fixed to each other by an adhesive.Type: ApplicationFiled: October 17, 2002Publication date: October 23, 2003Applicant: FUJITSU LIMITEDInventors: Takao Nishimura, Tadashi Uno, Hiroshi Onodera, Akira Takashima
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Patent number: 6621169Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.Type: GrantFiled: August 29, 2001Date of Patent: September 16, 2003Assignee: Fujitsu LimitedInventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
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Patent number: 6471501Abstract: A mold for press-molding a resin package body includes a lower mold and an upper mold, wherein the upper mold includes a press plate held in a tiltable manner with respect to a press head used for urging the upper mold against the lower mold and a lock mechanism for locking the press plate. The lower mold includes an inner die carrying a semiconductor device and a resin tablet and an outer die surrounding the inner die in a manner movable up and down with respect to the inner die. In operation, the press plate is first engaged with the outer die in the unlocked state to achieve an exact parallelism with respect to the inner die, and after locking the press plate and melting the resin tablet, the press plate is urged further toward the inner die while simultaneously lowering the outer die such that the space formed by the lower die, outer die and the press plate for accommodating a semiconductor chip is collapsed.Type: GrantFiled: March 18, 1999Date of Patent: October 29, 2002Assignee: Fujitsu LimitedInventors: Yasuhiro Shinma, Muneharu Morioka, Norio Fukasawa, Yuzo Hamanaka, Tadashi Uno, Hirohisa Matsuki, Kenichi Nagashige
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Patent number: 6388333Abstract: A plurality of semiconductor devices can be mounted on a mounting board in a three-dimensional structure by stacking one on another with a simple structure. A semiconductor element is mounted on a first surface of an interposer. Electrode pads connected to the semiconductor element are arranged around the semiconductor element on the first surface of the interposer. Protruding electrodes are provided on the respective electrode pads. Through holes are formed in the interposer so as to extend from a second surface opposite to the first surface of the redistribution substrate to the respective electrode pads. The semiconductor element is encapsulated by a seal resin. Each of the protruding electrodes is higher than the sealed portion of the semiconductor element.Type: GrantFiled: June 27, 2000Date of Patent: May 14, 2002Assignee: Fujitsu LimitedInventors: Fumihiko Taniguchi, Kouhei Orikawa, Tadashi Uno, Fumihiko Ando, Akira Takashima, Hiroshi Onodera, Eiji Yoshida, Kazuo Teshirogi
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Publication number: 20020027295Abstract: In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.Type: ApplicationFiled: August 29, 2001Publication date: March 7, 2002Applicant: Fujitsu LimitedInventors: Katsuhito Kikuma, Mitsutaka Ikeda, Yoshihiro Tsukidate, Yuji Akashi, Kaname Ozawa, Akira Takashima, Tadashi Uno, Takao Nishimura, Fumihiko Ando, Hiroshi Onodera, Hayato Okuda
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Patent number: 6186424Abstract: In a method and an apparatus for manufacturing chips for a thixomolding-process injection molding machine, primary crushed pieces obtained by fragmenting and crushing metal alloy wastes are cut and fragmented by a chip manufacturing apparatus having fixed blades, rotating blades, and a screen so as to obtain chips, with the result that the surfaces are polished, and a powder is eliminated by forced exhaust air, thereby making it possible to manufacture the chips while preventing ignition and explosion.Type: GrantFiled: October 28, 1998Date of Patent: February 13, 2001Assignees: The Japan Steel Works, Ltd., Nippon Thermochemical Co., Ltd.Inventors: Tadashi Uno, Kazuo Kitamura
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Patent number: 6060768Abstract: A semiconductor device includes a semiconductor chip in which electrode pads are formed with a first pitch, leads electrically connected with the electrode pads through lines, and sealing plastic sealing the semiconductor chip. In the semiconductor device, projections used for external connection ports are formed in the leads with a second pitch. The sealing plastic seals the lines connecting the electrode pads and the leads, but the projections are exposed from the sealing plastic.Type: GrantFiled: September 23, 1997Date of Patent: May 9, 2000Assignee: Fujitsu LimitedInventors: Katsuhiro Hayashida, Mitsutaka Sato, Tadashi Uno, Tetsuya Fujisawa, Masaki Waki
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Patent number: 5984699Abstract: A lead frame is formed by subjecting a frame base to a forming process, a semiconductor chip is fixed on leads formed in the lead frame and wires are provided in the semiconductor chip, and then a package which accommodates the semiconductor chip is formed; a non-conductive adhesive being provided, before the forming process, on a position on the frame base in which the leads are formed, and unnecessary portions of the frame base and the non-conductive adhesive being removed in the forming process so that the leads having a predetermined configuration and provided with the non-conductive adhesive are formed.Type: GrantFiled: January 29, 1997Date of Patent: November 16, 1999Assignee: Fujitsu LimitedInventors: Masaki Waki, Katsuhiro Hayashida, Mitsutaka Sato, Tadashi Uno, Kazuhiko Mitobe, Tetsuya Fujisawa