Patents by Inventor Tadashige Kadoi

Tadashige Kadoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7171590
    Abstract: A multi-processor system includes a partition including a selected number of nodes selected from a plurality of nodes provided in a plurality of node groups, each of the nodes including a computer. A failed node in the partition notifies a failure to a corresponding service processor of the node group and other nodes of the partition. The corresponding service processor and the service processors managing the other nodes notify the error log information to a service processor manager, which identifies the location of the failure and indicate the service processors to recover from the failure.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: January 30, 2007
    Assignee: NEC Corporation
    Inventor: Tadashige Kadoi
  • Publication number: 20040153888
    Abstract: A multi-processor system includes a partition including a selected number of nodes selected from a plurality of nodes provided in a plurality of node groups, each of the nodes including a computer. A failed node in the partition notifies a failure to a corresponding service processor of the node group and other nodes of the partition. The corresponding service processor and the service processors managing the other nodes notify the error log information to a service processor manager, which identifies the location of the failure and indicate the service processors to recover from the failure.
    Type: Application
    Filed: July 28, 2003
    Publication date: August 5, 2004
    Applicant: NEC Corporation
    Inventor: Tadashige Kadoi
  • Publication number: 20020194371
    Abstract: A loop network without a standby loop is provided, wherein switch devices in plural stages are connected through multiple loops. The network has at least a pair of loops each of which transfers data in the opposite directions. Under normal conditions, the respective loops transfer data separately. On the other hand, when an error occurs in either loop in a switch device, a switch device located immediate upstream of the faulty section executes loop back operation to build one end of a C-loop. Moreover, the switch device in which the error occurs in the loop also executes loop back operation after outputting data in process to build the other end of the C-loop. By this way, the C-loop circumventing the faulty point can be established. Thereby, it becomes possible to transfer data through the C-loop with a guarantee of ordering and to repair, replace and/or maintain the faulty point without any influenced on the network.
    Type: Application
    Filed: June 5, 2002
    Publication date: December 19, 2002
    Applicant: NEC CORPORATION
    Inventor: Tadashige Kadoi