Patents by Inventor Tadasi Oshima

Tadasi Oshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6420095
    Abstract: A method of manufacturing a semiconductor device including the steps of: forming a transparent oxide film on a light reflecting surface; forming an anti-reflective a-c film on the surface of the transparent film; and coating a photoresist film on the surface of the anti-reflective film and patterning the photoresist film, wherein the thicknesses of the anti-reflective film and the transparent film are selected so as to set a standing wave intensity Isw=I&dgr;/Iave to 0.2 or smaller, where Iave is an average value of light intensity in the photoresist film, and I&dgr; is an amplitude of a light intensity change. A fine pattern can be formed on a highly reflective substrate with a small size variation and at a high precision.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: July 16, 2002
    Assignee: Fujitsu Limited
    Inventors: Eiichi Kawamura, Teruyoshi Yao, Nobuhisa Naori, Koichi Hashimoto, Masaharu Kobayashi, Tadasi Oshima
  • Patent number: 5750316
    Abstract: A method of manufacturing a semiconductor device including the steps of: forming a transparent oxide film on a light reflecting surface; forming an anti-reflective a-c film on the surface of the transparent film; and coating a photoresist film on the surface of the anti-reflective film and patterning the photoresist film, wherein the thicknesses of the anti-reflective film and the transparent film are selected so as to set a standing wave intensity I.sub.sw =I.delta./I.sub.ave to 0.2 or smaller, where I.sub.ave is an average value of light intensity in the photoresist film, and I.delta. is an amplitude of a light intensity change. A fine pattern can be formed on a highly reflective substrate with a small size variation and at a high precision.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: May 12, 1998
    Assignee: Fujitsu Limited
    Inventors: Eiichi Kawamura, Teruyoshi Yao, Nobuhisa Naori, Koichi Hashimoto, Masaharu Kobayashi, Tadasi Oshima
  • Patent number: 5691237
    Abstract: A semiconductor substrate 11 having concavities and convexities in the upper surface, and silica particles (granular insulators) 15 provided in the concavities to planarize the entire upper surface of the semiconductor substrate 11 are included. First, the silica particles 15 are laid over an upper surface of a semiconductor substrate 11 to provide the granular insulators 15 in cavities in the upper surface of the semiconductor substrate 11, and the silica particles 15 provided on convexities on the upper surface of the semiconductor substrate 11 are removed, whereby the concavities 11 are buried with the silica particles 15 so as to improve global planarizarion.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: November 25, 1997
    Assignee: Fujitsu Limited
    Inventors: Yoshiyuki Ohkura, Hideki Harada, Tadasi Oshima