Patents by Inventor Tadatsugu Hirose

Tadatsugu Hirose has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7705806
    Abstract: A method for driving a plasma display panel, including a plurality of display electrode pairs and a plurality of address electrodes, and which includes at least an address period and a sustain discharge period. In the address period, performing address processing, between the address electrodes and a display electrode configured as either a set of odd or even numbered display electrodes, sequentially to all of one of the sets of display electrode pairs, and thereafter address processing, between the address electrodes and a display electrode configured as the other set of display electrode pairs, sequentially to all of the other set of display electrode pairs. In the sustain discharge period, supplying at least one first sustain discharge pulse to the one set of display electrode pairs, and supplying at least one second sustain discharge pulse to the other set of display electrode pairs.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 27, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20070075934
    Abstract: A Plasma Display Apparatus having common electrodes and address electrodes extending in a first direction and scan electrodes extending in a second direction perpendicular to the first direction, and each address electrode is aligned with a respective common electrode. A display cell is formed at a crossing portion of each common electrode and address electrode pair and each scan electrode. A lit state or an unlit state of each display cell is selected by applying, in individual succession, scan pulses to scan electrodes and selectively applying address pulses to the address electrodes. A sustain discharge is produced in each display cell selected to be lit by applying sustain pulses between the common electrodes and the scan electrodes.
    Type: Application
    Filed: December 5, 2006
    Publication date: April 5, 2007
    Applicant: HITACHI, LTD.
    Inventors: Tadatsugu Hirose, Yoshiho Seo, Tomokatsu Kishi, Takahiro Takamori
  • Patent number: 7164394
    Abstract: A PDP apparatus of good display quality has been disclosed, wherein plural common electrodes and plural scan electrodes that extend in the directions perpendicular to each other are formed on a first substrate and plural address electrodes that respectively make a pair with the plural common electrodes and extend in the same direction of that thereof are formed on a second substrate. A display cell is formed at the crossing portion of each pair of the common electrode and the address electrode and each scan electrode, the lit state or the unlit state of each display cell is selected by applying a scan pulse sequentially to the scan electrode and applying an address pulse selectively to the address electrode in synchronization with the application of the scan pulse, and a sustain pulse is applied to the plural common electrodes and the plural scan electrodes.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: January 16, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tadatsugu Hirose, Yoshiho Seo, Tomokatsu Kishi, Takahiro Takamori
  • Publication number: 20060050094
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: October 31, 2005
    Publication date: March 9, 2006
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 6965359
    Abstract: Method for driving a plasma display panel. At least one first discharge sustaining pulse is applied to a first pair of display electrodes, and at least one second discharge sustaining pulse applied to an adjacent pair of display electrodes. The first and second discharge sustaining pulses are applied such that they are in the same phase as one another and/or such that a current in the first pair of display electrodes flows in the opposite direction from a current in the adjacent pair of display electrodes.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: November 15, 2005
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 6882114
    Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a different kind of color, separators which separate the plural kinds of phosphors, and discharge cells having sustain electrode pairs which create discharges producing the light emissions from the phosphors. In the plasma display panel, sustain discharge currents through the sustain electrode pairs in the discharge cells are set at different values according to respective brightness of the lights emitted from the plural kinds of phosphors.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Limited
    Inventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
  • Patent number: 6593693
    Abstract: A plasma display panel having a high power efficiency by reducing parasitic capacitances comprises first and second substrates disposed facing each other, a plurality of address lines formed on the first substrate and extending along a first direction and a plurality of X and Y electrodes formed on the second substrate and extending along a second direction crossing the first direction. A first dielectric layer covers the X and Y electrodes formed on the second substrate, the first dielectric layer having a dielectric constant higher than a dielectric constant of the second substrate, and a trench formed at least through the first dielectric layer in an area between two adjacent X and Y electrodes, the trench extending along the second direction.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: July 15, 2003
    Assignee: Fujitsu Limited
    Inventors: Akihiro Takagi, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi, Noriaki Setoguchi
  • Patent number: 6531995
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: March 11, 2003
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20030020673
    Abstract: A PDP apparatus of good display quality has been disclosed, wherein plural common electrodes and plural scan electrodes that extend in the directions perpendicular to each other are formed on a first substrate and plural address electrodes that respectively make a pair with the plural common electrodes and extend in the same direction of that thereof are formed on a second substrate. A display cell is formed at the crossing portion of each pair of the common electrode and the address electrode and each scan electrode, the lit state or the unlit state of each display cell is selected by applying a scan pulse sequentially to the scan electrode and applying an address pulse selectively to the address electrode in synchronization with the application of the scan pulse, and a sustain pulse is applied to the plural common electrodes and the plural scan electrodes.
    Type: Application
    Filed: March 21, 2002
    Publication date: January 30, 2003
    Inventors: Tadatsugu Hirose, Yoshiho Seo, Tomokatsu Kishi, Takahiro Takamori
  • Patent number: 6512501
    Abstract: A method for driving a plasma display panel applies, within a subfield among the n subfields, a narrow-width pulse having a pulse width equal to or less than 2 &mgr;s to first electrodes in order to cause an erase discharge while terminating a discharge caused between the first and second electrodes, and applies a voltage pulse to third electrodes so that the voltage pulse falls at the same time as the narrow-width pulse falls.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: January 28, 2003
    Assignee: Fujitsu Limited
    Inventors: Keishin Nagaoka, Shigetoshi Tomio, Tadatsugu Hirose, Keiichi Kaneko, Shigeki Kameyama, Tomokatsu Kishi, Tetsuya Sakamoto, Takahiro Takamori, Akihiro Takagi
  • Publication number: 20020047582
    Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a respective, different kind of color, separators which separate the plural kinds of phosphors and discharge cells having sustain electrode pairs which create discharges producing the light emissions from the phosphors. In the plasma display pane, sustain discharge currents through the sustain electrode pairs in the discharge cells are set respective, different values according to respective brightnesses of the lights emitted from the plural kinds of phosphors.
    Type: Application
    Filed: December 28, 2001
    Publication date: April 25, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
  • Patent number: 6373452
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Grant
    Filed: July 31, 1996
    Date of Patent: April 16, 2002
    Assignee: Fujiitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20020030644
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: August 17, 1998
    Publication date: March 14, 2002
    Inventors: TOMOYUKI ISHII, TADATSUGU HIROSE, YOSHIKAZU KANAZAWA
  • Patent number: 6353292
    Abstract: A plasma display panel comprising plural kinds of phosphors, each of which emits a light having a different kind of color, separators which separate the plural kinds of phosphors and discharge cells having sustain electrode pairs which create discharges to create the light emissions from the phosphors. In the plasma display panel, a sustain discharge current through each sustain electrode pair in the discharge cells is set a different value according to a brightness of each light emitted from the plural kinds of phosphors.
    Type: Grant
    Filed: January 20, 2000
    Date of Patent: March 5, 2002
    Assignee: Fujitsu Limited
    Inventors: Takahiro Takamori, Tadatsugu Hirose, Shigeki Kameyama, Tomokatsu Kishi
  • Publication number: 20020021265
    Abstract: An electrode drive circuit performs interlaced scanning, ensuring that the phases of the sustaining pulse in odd-numbered lines and even-numbered lines among L1 to L8 between surface discharge electrodes are the reverse of each other. With this, when either odd-numbered lines or even-numbered lines are displayed, the voltages applied between the electrodes of the undisplayed lines are at 0, eliminating the necessity for partitioning walls on the surface discharge electrodes. In surface discharge electrodes, X electrodes are provided on the two sides of a Y electrode and the area between the Y electrode and the X electrode on one side is assigned a display line at an odd-numbered frame, and the area between the Y electrode and the X electrode on the other side is assigned a display line in an even-numbered frame.
    Type: Application
    Filed: September 28, 2001
    Publication date: February 21, 2002
    Applicant: Fujitsu Limited
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Patent number: 5898414
    Abstract: A display apparatus permitting high resolution and a large number of gray-scale levels and causing indiscernible flicker has been disclosed. One frame is divided into or composed of j subframes, and light is produced according to a luminance level predetermined subframe by subframe in order to express intermediate gray-scale of a picture. Emphasis is put on the fact that display to be performed during each subframe within one frame can be controlled independently. An interlaced-scanning display is carried out during k subframes associated with low-order weighted bits out of j subframes, and a noninterlaced-scanning display is carried out during the other j-k subframes associated with high-order weighted bits. The ratio of an addressing scan time to a subframe associated with a small weight is large, and the ratio of an addressing scan time to a whole frame is very large. If the addressing scan time can be reduced as mentioned above, a great effect would be exerted.
    Type: Grant
    Filed: May 30, 1997
    Date of Patent: April 27, 1999
    Assignee: Fujitsu Limited
    Inventors: Kenji Awamoto, Naoki Matsui, Tadatsugu Hirose, Fumitaka Asami
  • Patent number: 5828353
    Abstract: A triple-electrode planar display capable of achieving further power saving has been disclosed. A drive unit is dedicated to a planar display having a display panel in which cells being arranged in the form of a matrix and having a memory function and discharge glow function are formed, in which one of each pair of electrodes on the same substrate which are responsible for discharge glow is a common electrode connected in common. The drive unit includes a common electrode drive circuit for applying an alternating voltage to the common electrode, and a power save circuit that when the common electrode is changed from a high potential to a low potential, restores and accumulates power applied to the common electrode, and that when the common electrode is changed from the high potential to the low potential, applies accumulated power to the common electrode.
    Type: Grant
    Filed: June 21, 1996
    Date of Patent: October 27, 1998
    Assignee: Fujitsu Limited
    Inventors: Tomokatsu Kishi, Kyoji Kariya, Tadatsugu Hirose, Shigetoshi Tomio, Yoshimasa Awata, Shigeki Kameyama, Kazuo Yoshikawa, Akira Otsuka
  • Patent number: 5786794
    Abstract: A flat panel display has a low withstand voltage and performs high speed line sequential scanning and recovers power. An AC type panel display has electrodes arranged in a matrix form, a push-pull type driver circuit, having first and second transistors, provided for each pair of plural pairs, of power supply lines connected to a driver circuit for driving a plurality of display electrodes to be scanned and a power supply which supplies a defined voltage to one of the respective power supply lines of each pair connected to the corresponding driver circuit, and a leakage control switch which leaks the defined voltage applied to the power supply line.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: July 28, 1998
    Assignee: Fujitsu Limited
    Inventors: Tomokatsu Kishi, Shigeki Kameyama, Kazuo Yoshikawa, Akira Otsuka, Tadatsugu Hirose
  • Patent number: 4368465
    Abstract: A method of actuating a PDP device uses an actuating pulse signal which comprises an erasing mode for erasing data displayed on a display panel, a writing mode for writing new data on the panel and a sustaining mode for sustaining a state of displaying the data. The data to be displayed are input by an input signal which is not synchronized with the actuating pulse signal. At and before the time of changing the mode of the actuating pulse signal, at least one pulse is eliminated from the actuating pulse signal.
    Type: Grant
    Filed: August 7, 1981
    Date of Patent: January 11, 1983
    Assignee: Fujitsu Limited
    Inventors: Osamu Hirakawa, Tadatsugu Hirose
  • Patent number: 3979718
    Abstract: A plasma display panel driving method and system in which a specified one of the panel cells is discharged at all times and electrons produced by the discharge serve as initial electrons for the other display cells, thereby to increase the writing response speed of the display cells and ensure achievement of writing operation.
    Type: Grant
    Filed: January 10, 1975
    Date of Patent: September 7, 1976
    Assignee: Fujitsu Ltd.
    Inventors: Shozo Umeda, Tadatsugu Hirose, Shizuo Andoh