Patents by Inventor Tadayoshi Iwaana

Tadayoshi Iwaana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6278140
    Abstract: An insulated gate thyristor is provided which includes: a first-conductivity-type base layer, first and second-conductivity-type base regions formed in the base layer, a first-conductivity-type source region formed in the first base region, a first-conductivity-type emitter region formed in the second base region, and a gate electrode layer formed on a gate insulating film over the first base region, first-conductivity-type base layer, and second base region, which are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: August 21, 2001
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yuichi Harada, Noriyuki Iwamuro, Tadayoshi Iwaana
  • Patent number: 6242967
    Abstract: A semiconductor device is provided which includes a first unipolar transistor provided in a front stage of the device, second unipolar transistor provided in the front stage, and a bipolar transistor provided in a rear stage of the device. In this semiconductor device, drain and the source of the first unipolar transistor are connected to collector and the base of the bipolar transistor, respectively, and drain and the source of the second unipolar transistor are connected to emitter and base of the bipolar transistor, respectively.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: June 5, 2001
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Noriyuji Iwamuro, Hisao Shigekane, Yuichi Harada, Tadayoshi Iwaana
  • Patent number: 6091087
    Abstract: An insulated gate thyristor includes a first-conductivity-type base layer having a high resistivity, first and second second-conductivity-type base regions formed in a surface layer of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, and a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: July 18, 2000
    Assignee: Fuji Electric Co., Ltd
    Inventors: Noriyuki Iwamuro, Yuichi Harada, Tadayoshi Iwaana
  • Patent number: 6054728
    Abstract: An insulated gate thyristor is provided which includes: a first-conductivity-type base layer, first and second second-conductivity-type base regions formed in the base layer, a first-conductivity-type source region formed in the first base region, a first-conductivity-type emitter region formed in the second base region, and a gate electrode layer formed on a gate insulating film over the first base region, first-conductivity-type base layer, and second base region, which are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region.
    Type: Grant
    Filed: April 3, 1998
    Date of Patent: April 25, 2000
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Yuichi Harada, Noriyuki Iwamuro, Tadayoshi Iwaana
  • Patent number: 5981984
    Abstract: An insulated gate thyristor includes a first-conductivity-type base layer having a high resistivity, first and second second-conductivity-type base regions formed in a surface layer of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, and a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region.
    Type: Grant
    Filed: October 16, 1997
    Date of Patent: November 9, 1999
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Tadayoshi Iwaana, Yuichi Harada, Noriyuki Iwamuro
  • Patent number: 5874751
    Abstract: An insulated gate thyristor is provided which includes a first-conductivity-type base layer of high resistivity, first and second second-conductivity-type base regions formed in a surface layer of a first major surface of the first-conductivity-type base layer, a first-conductivity-type source region formed in a surface layer of the first second-conductivity-type base region, a first-conductivity-type emitter region formed in a surface layer of the second second-conductivity-type base region, a gate electrode formed on surfaces of the first second-conductivity-type base region, the first-conductivity-type base layer, and the second second-conductivity-type base region, which surfaces are interposed between the first-conductivity-type source region and the first-conductivity-type emitter region, an insulating film interposed between the gate electrode and these surface of the base regions and layer, a first main electrode in contact with both the first second-conductivity-type base region and the first-conduct
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: February 23, 1999
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Noriyuki Iwamuro, Yuichi Harada, Tadayoshi Iwaana