Patents by Inventor Tadayoshi Nakayama
Tadayoshi Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10424055Abstract: The invention realizes, with a circuit size having a small number of multipliers, one-dimensional cubic interpolation, which is a primitive calculation of two-dimensional bicubic interpolation that is often used as high image quality interpolation processing of images. An image processing apparatus includes a first linear interpolation calculator that generates an interpolated pixel value at an interpolation position through linear interpolation, based on pixel values of a pair of pixels among a plurality of pixels, a plurality of second linear interpolation calculators that generate a plurality of correction values by respectively performing linear interpolation based on a pair of difference values among a plurality of difference values between pixel values of the plurality of pixels, and a calculator that generates a pixel value at the interpolation position based on the interpolated pixel value and the plurality of correction values.Type: GrantFiled: May 25, 2017Date of Patent: September 24, 2019Assignee: CANON KABUSHIKI KAISHAInventor: Tadayoshi Nakayama
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Patent number: 10325345Abstract: An image processing device that transforms an image includes a storage unit configured to store coordinate values in a coordinate system of a pre-transformed image, each of the coordinate value corresponding to a grid point in a coordinate system of a transformed image, a selection unit configured to select a grid point in the vicinity of a target pixel in the transformed image, a calculation unit configured to refer to the pre-transformed coordinate value, corresponding to the selected grid point and stored in the storage unit, and to calculate a pre-transformed coordinate value corresponding to the target pixel, using the referred coordinate value, and an output unit configured to output a pixel value of the coordinate value calculated in the pre-transformed image, as a pixel value of the target pixel in the transformed image.Type: GrantFiled: April 12, 2017Date of Patent: June 18, 2019Assignee: Canon Kabushiki KaishaInventors: Tetsurou Kitashou, Tadayoshi Nakayama
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Patent number: 10312837Abstract: An information processing apparatus includes an acquisition unit configured to acquire a first phase signal and a second phase signal that are acquired by measuring a rotation of a moving object, and a calculation unit configured to calculate a rotational angle by an iterative calculation so as to satisfy a relational expression bearing an arctangent. The relational expression bearing the arctangent uses a first cosine wave and a second cosine wave at a higher harmonic of the first cosine wave for the first phase signal, and a first sine wave and a second sine wave at a higher harmonic of the first sine wave for the second phase signal. The first phase signal and the second phase signal may, for example, be analog signals having a wave shape.Type: GrantFiled: April 24, 2017Date of Patent: June 4, 2019Assignee: Canon Kabushiki KaishaInventors: Masahiko Mizoguchi, Tadayoshi Nakayama, Toru Aida
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Publication number: 20180218477Abstract: A device includes a calculation unit configured to calculate difference data up to a predetermined stage with respect to a plurality of reference data, a selection unit configured to select a forward difference parameter from the reference data and the difference data, an adjustment unit configured to adjust the forward difference parameter to segment a corresponding forward step width, and an arithmetic unit configured to determine interpolation data for the plurality of reference data, by performing a forward addition operation based on the adjusted forward difference parameter.Type: ApplicationFiled: January 11, 2018Publication date: August 2, 2018Inventor: Tadayoshi Nakayama
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Patent number: 9959094Abstract: An arithmetic apparatus comprises a plurality of cascade-connected arithmetic units. Each of the plurality of arithmetic units comprises: a calculator configured to operate in one of a rotation mode of performing a rotation calculation, and a vectoring mode of calculating a rotation angle; and a holding unit configured to hold rotational direction information output from the calculator in the vectoring mode. In addition, when operating in the rotation mode, the calculator performs the rotation calculation on data input from an arithmetic unit in a preceding stage, based on the rotational direction information held in the holding unit.Type: GrantFiled: June 3, 2015Date of Patent: May 1, 2018Assignee: CANON KABUSHIKI KAISHAInventors: Tadayoshi Nakayama, Koki Mitsunami
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Patent number: 9940691Abstract: When deducing a homography matrix representing a geometrical relationship between two images, an image processing apparatus obtains a transformation matrix for four feature points in each of the two images based on reference coordinates. More specifically, the apparatus obtains the area of a triangle formed by three out of the four feature points, and calculates projective parameters of transformation matrices from the area ratios. The apparatus calculates the homography matrix between the images by the product of one of the two obtained matrices and an inverse matrix of the other.Type: GrantFiled: January 4, 2016Date of Patent: April 10, 2018Assignee: CANON KABUSHIKI KAISHAInventors: Koki Mitsunami, Tadayoshi Nakayama
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Publication number: 20170345137Abstract: The invention realizes, with a circuit size having a small number of multipliers, one-dimensional cubic interpolation, which is a primitive calculation of two-dimensional bicubic interpolation that is often used as high image quality interpolation processing of images. An image processing apparatus includes a first linear interpolation calculator that generates an interpolated pixel value at an interpolation position through linear interpolation, based on pixel values of a pair of pixels among a plurality of pixels, a plurality of second linear interpolation calculators that generate a plurality of correction values by respectively performing linear interpolation based on a pair of difference values among a plurality of difference values between pixel values of the plurality of pixels, and a calculator that generates a pixel value at the interpolation position based on the interpolated pixel value and the plurality of correction values.Type: ApplicationFiled: May 25, 2017Publication date: November 30, 2017Inventor: Tadayoshi Nakayama
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Publication number: 20170317618Abstract: An information processing apparatus includes an acquisition unit configured to acquire a first phase signal and a second phase signal that are acquired by measuring a rotation of a moving object, and a calculation unit configured to calculate a rotational angle by an iterative calculation so as to satisfy a relational expression bearing an arctangent. The relational expression bearing the arctangent uses a first cosine wave and a second cosine wave at a higher harmonic of the first cosine wave for the first phase signal, and a first sine wave and a second sine wave at a higher harmonic of the first sine wave for the second phase signal. The first phase signal and the second phase signal may, for example, be analog signals having a wave shape.Type: ApplicationFiled: April 24, 2017Publication date: November 2, 2017Inventors: Masahiko Mizoguchi, Tadayoshi Nakayama, Toru Aida
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Publication number: 20170301059Abstract: An image processing device that transforms an image includes a storage unit configured to store coordinate values in a coordinate system of a pre-transformed image, each of the coordinate value corresponding to a grid point in a coordinate system of a transformed image, a selection unit configured to select a grid point in the vicinity of a target pixel in the transformed image, a calculation unit configured to refer to the pre-transformed coordinate value, corresponding to the selected grid point and stored in the storage unit, and to calculate a pre-transformed coordinate value corresponding to the target pixel, using the referred coordinate value, and an output unit configured to output a pixel value of the coordinate value calculated in the pre-transformed image, as a pixel value of the target pixel in the transformed image.Type: ApplicationFiled: April 12, 2017Publication date: October 19, 2017Inventors: Tetsurou Kitashou, Tadayoshi Nakayama
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Publication number: 20160196634Abstract: When deducing a homography matrix representing a geometrical relationship between two images, an image processing apparatus obtains a transformation matrix for four feature points in each of the two images based on reference coordinates. More specifically, the apparatus obtains the area of a triangle formed by three out of the four feature points, and calculates projective parameters of transformation matrices from the area ratios. The apparatus calculates the homography matrix between the images by the product of one of the two obtained matrices and an inverse matrix of the other.Type: ApplicationFiled: January 4, 2016Publication date: July 7, 2016Inventors: Koki Mitsunami, Tadayoshi Nakayama
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Publication number: 20150355885Abstract: An arithmetic apparatus comprises a plurality of cascade-connected arithmetic units. Each of the plurality of arithmetic units comprises: a calculator configured to operate in one of a rotation mode of performing a rotation calculation, and a vectoring mode of calculating a rotation angle; and a holding unit configured to hold rotational direction information output from the calculator in the vectoring mode. In addition, when operating in the rotation mode, the calculator performs the rotation calculation on data input from an arithmetic unit in a preceding stage, based on the rotational direction information held in the holding unit.Type: ApplicationFiled: June 3, 2015Publication date: December 10, 2015Inventors: Tadayoshi Nakayama, Koki Mitsunami
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Publication number: 20130329009Abstract: The invention significantly decreases the number of buffers for an encoding delay and a data delay without lowering the prediction performance in predication encoding. To this end, a frame, at the same time, of a right neighboring camera is referred to, and the encoding timing of a reference destination image is delayed by an encoding time of several blocks with respect to a reference source image.Type: ApplicationFiled: May 31, 2013Publication date: December 12, 2013Inventor: Tadayoshi Nakayama
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Patent number: 8554004Abstract: This invention decreases the count of access to a memory which stores image data regarding orthogonal transform, and quickly generates orthogonal transform coefficients. An apparatus includes a storage unit which stores image data, a memory controller which reads each block from the storage unit, a first transforming unit which receives and orthogonally transforms the input block, and calculates only one DC component, a selector which selects and outputs one of the block read out via the memory controller, and data of DC components from the first transforming unit that are equal in number to pixels included in the block, a second transforming unit which orthogonally transforms data that have been output from the selector and are equal in number to pixels included in the block, and outputs either one DC component or a plurality of AC components, and a controller which controls the memory controller, selector, and second transforming unit.Type: GrantFiled: March 24, 2011Date of Patent: October 8, 2013Assignee: Canon Kabushiki KaishaInventors: Reiko Fujino, Tadayoshi Nakayama
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Patent number: 8155476Abstract: An image processing apparatus includes a noise reduction unit configured to nonlinearly convert a signal obtained by subtracting a value of a subtraction image signal, which is read from a memory, from that of a current-frame image signal, to generate a noise-reduced signal by subtracting the nonlinearly converted signal from the current-frame image signal, and to store the noise-reduced signal in the memory, a read unit configured to read the subtraction image signal from the memory at a moment between a moment, at which the subtraction image signal read from the memory is stored in the memory, and a moment at which the subtraction image signal is read from the memory, and a generation unit configured to generate an image based on the subtraction image signal read by the read unit.Type: GrantFiled: June 3, 2008Date of Patent: April 10, 2012Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Nakayama
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Patent number: 8118337Abstract: A bumper is provided with to-be-engaged projections, a radiator grille is provided with engaging projections. The radiator grille is allowed to move and approach bumper rearward of a vehicle. According to this configuration, the engaging projections engage the to-be-engaged projections and they are engaged with and fixed to each other. At this time, a bumper-side seizing unit of the bumper is fitted into a grille-side seizing unit of the radiator grille, thereby limiting the vertical direction. In an engaged state between the engaging projections and the to-be-engaged projections, an inclining surface of one of the engaging projections comes into contact with a rearward inclining surface of the one of the to-be-engaged projections, and an inclining surface of the other engaging projection is separated from a rearward inclining surface of the other to-be-engaged projection.Type: GrantFiled: March 11, 2009Date of Patent: February 21, 2012Assignee: Nissan Motor Co., Ltd.Inventor: Tadayoshi Nakayama
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Patent number: 8107767Abstract: A data transform apparatus transforms four integer data D0-D3 into one DC coefficient Y0 and three AC coefficients Y1-Y3 as lossless-Hadamard transform coefficients. A first calculation unit group adds date D0 to respective data D1 to D3. A first shifter shifts data D0 1 bit to the left. A second calculation unit group subtracts three data calculated by the first calculation unit group from output of the shifter. A second shifter halves a calculation result of the second calculation unit group by shifting the subtraction result 1 bit to the right, and executes round processing for truncating a fractional part of the halved data. A sign inverter inverts the sign of output from the second shifter, and outputs it as DC coefficient. A third calculation unit group subtracts output from the sign inverter from output of the first calculation unit group, and outputs these data as AC coefficients.Type: GrantFiled: November 6, 2008Date of Patent: January 31, 2012Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Nakayama
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Publication number: 20110255798Abstract: This invention decreases the count of access to a memory which stores image data regarding orthogonal transform, and quickly generates orthogonal transform coefficients. An apparatus includes a storage unit which stores image data, a memory controller which reads each block from the storage unit, a first transforming unit which receives and orthogonally transforms the input block, and calculates only one DC component, a selector which selects and outputs one of the block read out via the memory controller, and data of DC components from the first transforming unit that are equal in number to pixels included in the block, a second transforming unit which orthogonally transforms data that have been output from the selector and are equal in number to pixels included in the block, and outputs either one DC component or a plurality of AC components, and a controller which controls the memory controller, selector, and second transforming unit.Type: ApplicationFiled: March 24, 2011Publication date: October 20, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Reiko Fujino, Tadayoshi Nakayama
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Patent number: 8020905Abstract: A bumper is provided with to-be-engaged projections, a radiator grille is provided with engaging projections. The radiator grille is allowed to move and approach bumper rearward of a vehicle. According to this configuration, the engaging projections engage the to-be-engaged projections and they are engaged with and fixed to each other. At this time, a bumper-side seizing unit of the bumper is fitted into a grille-side seizing unit of the radiator grille, thereby limiting the vertical direction. In an engaged state between the engaging projections and the to-be-engaged projections, an inclining surface of one of the engaging projections comes into contact with a rearward inclining surface of the one of the to-be-engaged projections, and an inclining surface of the other engaging projection is separated from a rearward inclining surface of the other to-be-engaged projection.Type: GrantFiled: February 28, 2007Date of Patent: September 20, 2011Assignee: Nissan Motor Co., Ltd.Inventor: Tadayoshi Nakayama
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Patent number: 7929031Abstract: An image processing apparatus includes a feedback unit configured to perform first nonlinear conversion of a signal obtained by subtracting a value of a subtraction image signal from that of a current-frame image signal, and to obtain the next subtraction signal by subtracting a signal obtained by performing the first nonlinearly conversion from the current-frame image signal, and a noise reduction unit configured to perform second nonlinear conversion of a signal obtained by subtracting a value of the subtraction image signal from that of the current-frame image signal, and to obtain an output image signal by subtracting a signal obtained by performing the second nonlinear from the current-frame image signal.Type: GrantFiled: June 5, 2008Date of Patent: April 19, 2011Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Nakayama
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Patent number: 7916962Abstract: This invention implements a fast lossless transform almost free from a delay with a small calculation amount. The lossless transform can be used to perform lossless coding and lossy coding quickly. A first calculation unit multiplies data D0, D1, D2, and D3 input to the input terminals by respective weighting coefficients {a0, a1, a2, a3} of {½, ?½, ?½, ?½}, and summates the products. A rounding unit in the first calculation unit rounds the sum into an integer and outputs the integer value E. A second calculation unit multiplies the value E by weighting coefficients {b0, b1, b2, b3} of {?1, 1, 1, 1} set for the respective input data, and adds the products to the respective input data. This invention sets, for the relationship between the first and second weighting coefficients, a condition that a0*b0+a1*b1+a2*b2+a3*b3=?2 or 0.Type: GrantFiled: December 14, 2009Date of Patent: March 29, 2011Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Nakayama