Patents by Inventor Tadayoshi Seike

Tadayoshi Seike has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Input/output circuit of semiconductor integrated circuit
    Patent number: 6812766
    Abstract: The input/output circuit of the present invention includes a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit, driven with a control signal, draws a charge from an n-well diffusion region of the p-channel transistor during output. By the charge drawing, the potential at the n-well diffusion region of the p-channel transistor is kept at the supply voltage during output, and thus the input/output circuit is prevented from deterioration in current flow capability due to a back bias effect.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: November 2, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Oishi, Tadayoshi Seike, Masanori Hirofuji
  • Input/output circuit of semiconductor integrated circuit
    Publication number: 20040207457
    Abstract: The input/output circuit of the present invention includes a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit, driven with a control signal, draws a charge from an n-well diffusion region of the p-channel transistor during output. By the charge drawing, the potential at the n-well diffusion region of the p-channel transistor is kept at the supply voltage during output, and thus the input/output circuit is prevented from deterioration in current flow capability due to a back bias effect.
    Type: Application
    Filed: May 14, 2004
    Publication date: October 21, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hideo Oishi, Tadayoshi Seike, Masanori Hirofuji
  • Input/output circuit of semiconductor integrated circuit
    Publication number: 20020175734
    Abstract: The input/output circuit of the present invention includes a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit, driven with a control signal, draws a charge from an n-well diffusion region of the p-channel transistor during output. By the charge drawing, the potential at the n-well diffusion region of the p-channel transistor is kept at the supply voltage during output, and thus the input/output circuit is prevented from deterioration in current flow capability due to a back bias effect.
    Type: Application
    Filed: May 22, 2002
    Publication date: November 28, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideo Oishi, Tadayoshi Seike, Masanori Hirofuji