Patents by Inventor Tadayuki Habasaki

Tadayuki Habasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100193869
    Abstract: A semiconductor device includes a semiconductor substrate of a first conductivity-type, a buried diffusion layer of a second conductivity-type formed in the semiconductor substrate, a first well of the second conductivity-type having a bottom portion in contact with a top portion of the buried diffusion layer, the first well having an annular shape in a planar view, and a second well of the first conductivity-type formed to be surrounded by the first well. The semiconductor device further includes a diffusion region formed between a first portion of the second well and a second portion of the second well, the diffusion region having an impurity concentration lower than that of the second well, so that a depletion layer formed in the diffusion region can be provided, a transistor formed on the second well to function as an ESD (electro-static discharge) protection element, and an external terminal connected to a drain of the transistor.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 5, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Tadayuki Habasaki