Patents by Inventor Tadayuki Okawa

Tadayuki Okawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230261635
    Abstract: A piezoelectric vibration element that includes a piezoelectric piece having a first principal surface and a second principal surface; a via electrode penetrating the piezoelectric piece from the first principal surface to the second principal surface thereof; a conductive etch stop film covering the via electrode on the second principal surface; and a wiring electrode covering at least part of an outer edge of the conductive etch stop film on the second principal surface.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Tadayuki OKAWA, Toshio NISHIMURA
  • Publication number: 20230246625
    Abstract: A quartz crystal resonator unit that includes: a piezoelectric blank; a first excitation electrode on a first principal surface and within at least a part of a vibration portion of the piezoelectric blank; a second excitation electrode on a second principal surface and within at least a part of the vibration portion of the piezoelectric blank; a first extended electrode on the first principal surface and electrically connected to the first excitation electrode; and a second extended electrode on the second principal surface and electrically connected to the second excitation electrode; and an insulation layer including a hollow portion which defines a space with the second excitation electrode. A thickness of the first extended electrode is larger than a thickness of the second extended electrode. An end portion of the first extended electrode extends over the hollow portion in a plan view of the piezoelectric vibrator.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Inventors: Toshio NISHIMURA, Yuuki OOI, Tadashi YODA, Tadayuki OKAWA
  • Patent number: 11629046
    Abstract: A MEMS device is provided that includes a piezoelectric film, a first electrode and a second electrode sandwiching the piezoelectric film, a protective film that covers at least part of the second electrode and having a cavity that opens part of the second electrode, a third electrode that contacts the second electrode at least in the cavity and is provided so as to cover at least part of the protective film, and a first wiring layer having a first contact portion in contact with the third electrode.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: April 18, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Keiichi Umeda, Tadayuki Okawa, Taku Kamoto, Yuichi Goto, Yoshihisa Inoue, Takehiko Kishi
  • Patent number: 10998857
    Abstract: A resonator including a lower electrode, an upper electrode, and a piezoelectric film that is formed between the lower electrode and the upper electrode. A MEMS device is provided that includes an upper lid that faces the upper electrode, and a lower lid that faces the lower electrode and that seals the resonator together with the upper lid. A CMOS device is mounted on a surface of the upper lid or the lower lid opposite a surface that faces the resonator. The CMOS device includes a CMOS layer and a protective layer that is disposed on a surface of the CMOS layer opposite a surface that faces the resonator. The upper or lower lid to which the CMOS device is joined includes a through-electrode that electrically connects the CMOS device to the resonator.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: May 4, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Keiichi Umeda, Tadayuki Okawa, Taku Kamoto
  • Publication number: 20200290865
    Abstract: A MEMS device is provided that includes a piezoelectric film, a first electrode and a second electrode sandwiching the piezoelectric film, a protective film that covers at least part of the second electrode and having a cavity that opens part of the second electrode, a third electrode that contacts the second electrode at least in the cavity and is provided so as to cover at least part of the protective film, and a first wiring layer having a first contact portion in contact with the third electrode.
    Type: Application
    Filed: May 28, 2020
    Publication date: September 17, 2020
    Inventors: Keiichi Umeda, Tadayuki Okawa, Taku Kamoto, Yuichi Goto, Yoshihisa Inoue, Takehiko Kishi
  • Publication number: 20200244222
    Abstract: A resonator including a lower electrode, an upper electrode, and a piezoelectric film that is formed between the lower electrode and the upper electrode. A MEMS device is provided that includes an upper lid that faces the upper electrode, and a lower lid that faces the lower electrode and that seals the resonator together with the upper lid. A CMOS device is mounted on a surface of the upper lid or the lower lid opposite a surface that faces the resonator. The CMOS device includes a CMOS layer and a protective layer that is disposed on a surface of the CMOS layer opposite a surface that faces the resonator. The upper or lower lid to which the CMOS device is joined includes a through-electrode that electrically connects the CMOS device to the resonator.
    Type: Application
    Filed: April 15, 2020
    Publication date: July 30, 2020
    Inventors: Keiichi Umeda, Tadayuki Okawa, Taku Kamoto
  • Patent number: 10177289
    Abstract: A mounting substrate that includes external connection electrodes on a rear surface of a base material, and mounting electrodes on a front surface of the base material. In-hole electrodes connect the external connection electrodes and the mounting electrodes. A reflective film containing Al is located between the base material and the mounting electrodes. The reflective film is covered with an insulating film layer.
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: January 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuki Fukui, Junko Izumitani, Tadayuki Okawa
  • Publication number: 20170213943
    Abstract: A mounting substrate that includes external connection electrodes on a rear surface of a base material, and mounting electrodes on a front surface of the base material. In-hole electrodes connect the external connection electrodes and the mounting electrodes. A reflective film containing Al is located between the base material and the mounting electrodes. The reflective film is covered with an insulating film layer.
    Type: Application
    Filed: April 7, 2017
    Publication date: July 27, 2017
    Inventors: YUKI FUKUI, Junko lzumitani, Tadayuki Okawa
  • Publication number: 20160079218
    Abstract: An electrostatic protection device includes a base member formed of a high-resistance semiconductor material. External connecting lands are formed on a first principal surface of the base member along a first direction with a space therebetween. A diode section is formed in the first principal surface of the base member through a semiconductor forming process. The diode section is formed between formation regions of the external connecting lands along the first direction. A high concentration region is a region that has the same polarity as the base member and contains larger amounts of impurities than the base member. The high concentration region is formed in a ring shape enclosing the diode section in a plan view of the base member.
    Type: Application
    Filed: November 9, 2015
    Publication date: March 17, 2016
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kiminori WATANABE, Seiichi SATO, Toshiya WATANABE, Tadayuki OKAWA, Kiyoto ARAKI, Teiji YAMAMOTO
  • Patent number: 6655024
    Abstract: A method for manufacturing a circuit board having a through-hole for defining via hole, which has a sloped inner wall tilted at a desired tilt angle &thgr;, is provided. The through-hole has an inverted-trapezoidal cross-section and is made using a photomask having a via hole pattern including a light-shielding pattern corresponding to the bottom of the through-hole, and pluralities of light-shielding strips and translucent strips which are arranged alternately and substantially parallel to one another, the pluralities of light-shielding strips and translucent strips corresponding to the sloped inner wall of the through-hole.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: December 2, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masayuki Suzuki, Makoto Tose, Koji Yoshida, Tadayuki Okawa
  • Publication number: 20020179333
    Abstract: A method for manufacturing a circuit board having a through-hole for defining via hole, which has a sloped inner wall tilted at a desired tilt angle &thgr;, is provided. The through-hole has an inverted-trapezoidal cross-section and is made using a photomask having a via hole pattern including a light-shielding pattern corresponding to the bottom of the through-hole, and pluralities of light-shielding strips and translucent strips which are arranged alternately and substantially parallel to one another, the pluralities of light-shielding strips and translucent strips corresponding to the sloped inner wall of the through-hole.
    Type: Application
    Filed: April 23, 2002
    Publication date: December 5, 2002
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Masayuki Suzuki, Makoto Tose, Koji Yoshida, Tadayuki Okawa
  • Publication number: 20020076660
    Abstract: A method of forming a wiring pattern which includes the steps of: forming a resist pattern having a shrinkage-inhibiting effect on a substrate; releasing gas from the resist pattern by baking the resist pattern; film-forming an electrode material on the substrate and the resist pattern while the temperature of the substrate is kept lower than the baking temperature of the resist pattern; and removing the electrode material on the resist pattern by separating the resist pattern from the substrate.
    Type: Application
    Filed: November 17, 1999
    Publication date: June 20, 2002
    Inventors: YUJI TOYOTA, YOSHIHIRO KOSHIDO, KEI FUJIBAYASHI, RYOICHIRO TAKAHASHI, TADAYUKI OKAWA
  • Patent number: 6156672
    Abstract: A method of forming a dielectric thin film pattern, comprises the steps of: depositing a dielectric thin film on a substrate having a resist pattern thereon by a vapor deposition method, wherein as a material for the dielectric thin film, at least one of CeO.sub.2, Sm.sub.2 O.sub.3, Dy.sub.2 O.sub.3, Y.sub.2 O.sub.3, TiO.sub.2, Al.sub.2 O.sub.3, and MgO is used; and removing the resist pattern whereby the dielectric thin film is patterned.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: December 5, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yoshihiro Koshido, Kei Fujibayashi, Yuji Toyota, Tadayuki Okawa, Ryoichiro Takahashi
  • Patent number: 4008858
    Abstract: An apparatus for treating synthetic resin waste containing thermoplastic synthetic resin and various foreign matter which often contain volatile matter. This apparatus makes it possible to produce articles, from the resin waste, having good mechanical properties by first driving off volatile matter. The apparatus is especially usable for producing long, bar-shaped products, large-sized cylindrical products, piles, sleepers, or molding flasks for concrete works.
    Type: Grant
    Filed: July 22, 1975
    Date of Patent: February 22, 1977
    Assignee: Mitsubishi Petrochemical Company Limited
    Inventors: Masatora Yamada, Shigeo Tasaka, Tadayuki Okawa, Taichi Suzuki