Abstract: A synchronous signal detection circuit which detect a vertical synchronous signal and a horizontal synchronous signal from composite synchronous signal, including: a reset generation means for receiving an external composite synchronous signal and an external main clock signal to generate a reset signal at falling edge of the composite synchronous signal; a counter means being reset by the reset signal received from the reset generation means and for counting the main clock signal to generate first through fourth output signals; a vertical synchronous signal detection means for receiving the second output signal of the counter means and the composite synchronous signal to detect the vertical synchronous signal of the composite synchronous signal and generating the vertical synchronous signal; and a horizontal synchronous signal detection means for receiving the third and the fourth output signals of the counter means and the reset signal of the reset generation means to detect the horizontal synchronous signa

Abstract: A mode detection circuits in LCDs is disclosed, comprising: a first mode signal detection means for detecting an enable/synchronous signal mode in response to a vertical synchronous signal and for generating a first mode detection signal; a second mode signal detection means for detecting an enable mode signal based on a data enable signal and a clock signal and for generating a second mode detection signal; a mode selection means for selecting one of a first mode detection signal and a second mode detection signal from the first mode signal detection means and the second mode signal detection means in response to a mode selection signal and for providing the selected mode detection signal as a mode determining signal.

Abstract: A phase frequency detection circuit of a phase locked loop (PLL) for liquid crystal display which compares a phase between an external synchronous signal and an internal synchronous signal from the PLL to generate a phase difference detection signal, including: a dividing circuit for dividing the external synchronous signal and the horizontal synchronous signal; a phase difference detecting circuit for detecting the phase difference between the divided external synchronous signal and the divided horizontal synchronous signal from the dividing circuit; a phase discriminating circuit for discriminating whether the divided external synchronous signal is ahead of the divided horizontal synchronous signal and generating the phase discriminating signal; and a comparison device for receiving the phase difference detection signal from the phase difference detection circuit and the phase discriminating signal from the phase discriminating circuit to generate the phase frequency difference signal.

Abstract: A driving circuit is provided for generating driving voltages of a liquid crystal display comprising a plurality of thin film transistors, each of which includes a source, drain, and gate. The driving circuit includes: a switching part for generating first to fourth control signals which swing between a first power voltage and a second power voltage using first to fourth input logic control signals; a driving voltage generating part controlled by the first to the fourth control signals, for generating gate on and off voltages for turning on and off said thin film transistors by raising said second power voltage and dropping said first power voltage; and a voltage maintenance part for maintaining said gate on and off voltages inputted from said driving voltage generating part at a selected voltage level.