Patents by Inventor Tae Geun SEO

Tae Geun SEO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11600434
    Abstract: Disclosed are a power inductor and a method of manufacturing the same. The power inductor includes a body, a coil pattern provided in the body, an external electrode disposed on at least one surface of the body and extending to at least the other surface of the body, which is adjacent thereto, and a coupling layer provided between the body and an extended area of the external electrode.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 7, 2023
    Inventors: Gyeong Tae Kim, Tae Geun Seo
  • Publication number: 20220392690
    Abstract: The present disclosure relates to an electronic component and a method for manufacturing the same, and more particularly, to a surface mounting type electronic component provided on an electronic device and a method for manufacturing the same. An electronic component in accordance with an exemplary embodiment includes a main body part having a polyhedral shape and including a recessed portion formed as at least a portion of a plurality of edges at which two mutually adjacent surfaces meet is recessed, an insulation part provided on a surface of the main body part to cover the recessed portion, and an electrode part separately provided on the surface of the main body part except for an area on which the insulation part is provided.
    Type: Application
    Filed: August 20, 2021
    Publication date: December 8, 2022
    Inventors: Gyeong Tae KIM, Tae Geun SEO, Sang Hoon SHIN, Jin Su JEONG
  • Patent number: 11476037
    Abstract: Provided is a power inductor. The power inductor includes a body including metal powder and an insulation material, at least one base provided in the body, at least one coil pattern disposed on at least one surface of the base, and an external electrode disposed on each of at least two side surfaces of the body. At least a portion of the external electrode is made of the same material as the coil pattern.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 18, 2022
    Inventors: Gyeong Tae Kim, Tae Geun Seo, Sang Jun Park
  • Patent number: 11270837
    Abstract: Provided is a power inductor. The power inductor includes a body including magnetic powder and a polymer, at least one base provided in the body and having at least one surface on which at least one coil pattern is disposed, and an insulation layer disposed between the coil pattern and the body. The body includes at least region in which the magnetic powder having a particle size different from that of the magnetic power in a remaining region is distributed.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: March 8, 2022
    Inventors: Gyeong Tae Kim, Ki Joung Nam, Tae Geun Seo
  • Patent number: 11081271
    Abstract: The present disclosure discloses a circuit protection device including a first magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, a second magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, and a nonmagnetic layer in which a plurality of nonmagnetic sheets are laminated and which is disposed between the first and second magnetic layers. A noise filter part including a plurality of coil patterns is disposed in the nonmagnetic layer.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: August 3, 2021
    Inventors: Gyeong Tae Kim, Myung Ho Lee, Tae Geun Seo, Heon Guk Ha, Jae Ho Han
  • Patent number: 11031169
    Abstract: The present disclosure discloses a circuit protection device including a first magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, a second magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, and a nonmagnetic layer in which a plurality of nonmagnetic sheets are laminated and which is disposed between the first and second magnetic layers. A noise filter part including a plurality of coil patterns is disposed in the nonmagnetic layer.
    Type: Grant
    Filed: May 15, 2017
    Date of Patent: June 8, 2021
    Inventors: Gyeong Tae Kim, Myung Ho Lee, Tae Geun Seo, Heon Guk Ha, Jae Ho Han
  • Publication number: 20200365315
    Abstract: Disclosed are a power inductor and a method of manufacturing the same. The power inductor includes a body, a coil pattern provided in the body, an external electrode disposed on at least one surface of the body and extending to at least the other surface of the body, which is adjacent thereto, and a coupling layer provided between the body and an extended area of the external electrode.
    Type: Application
    Filed: December 7, 2018
    Publication date: November 19, 2020
    Inventors: Gyeong Tae KIM, Tae Geun SEO
  • Publication number: 20190189340
    Abstract: Provided is a power inductor. The power inductor includes a body including magnetic powder and a polymer, at least one base provided in the body and having at least one surface on which at least one coil pattern is disposed, and an insulation layer disposed between the coil pattern and the body. The body includes at least region in which the magnetic powder having a particle size different from that of the magnetic power in a remaining region is distributed.
    Type: Application
    Filed: September 27, 2017
    Publication date: June 20, 2019
    Inventors: Gyeong Tae KIM, Ki Joung NAM, Tae Geun SEO
  • Publication number: 20190189338
    Abstract: Provided is a power inductor. The power inductor includes a body including metal powder and an insulation material, at least one base provided in the body, at least one coil pattern disposed on at least one surface of the base, and an external electrode disposed on each of at least two side surfaces of the body. At least a portion of the external electrode is made of the same material as the coil pattern.
    Type: Application
    Filed: August 30, 2017
    Publication date: June 20, 2019
    Inventors: Gyeong Tae KIM, Tae Geun SEO, Sang Jun PARK
  • Publication number: 20190122801
    Abstract: The present disclosure discloses a circuit protection device including a first magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, a second magnetic layer in which a plurality of magnetic sheets are laminated and of which at least a portion of one surface is exposed, and a nonmagnetic layer in which a plurality of nonmagnetic sheets are laminated and which is disposed between the first and second magnetic layers. A noise filter part including a plurality of coil patterns is disposed in the nonmagnetic layer.
    Type: Application
    Filed: May 15, 2017
    Publication date: April 25, 2019
    Inventors: Gyeong Tae KIM, Myung Ho LEE, Tae Geun SEO, Heon Guk HA, Jae Ho HAN
  • Patent number: 10218330
    Abstract: Provided is a laminated chip device including a first laminate in which a plurality of conductor patterns formed on a plurality of sheets are connected to each other through a via formed to penetrate at least a sheet, and a second laminate provided over or below the first laminate and having a plurality of internal electrode patterns formed on a plurality of sheets, and the internal electrode patterns have a non-conductive region in at least a portion of an area corresponding to the via.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: February 26, 2019
    Assignee: INNOCHIPS TECHNOLOGY CO., LTD.
    Inventors: In Kil Park, Tae Hyung Noh, Gyeong Tae Kim, Myung Ho Lee, Tae Geun Seo, Min Soo Lee, Song Yeon Lee
  • Publication number: 20160276995
    Abstract: Provided is a laminated chip device including a first laminate in which a plurality of conductor patterns formed on a plurality of sheets are connected to each other through a via formed to penetrate at least a sheet, and a second laminate provided over or below the first laminate and having a plurality of internal electrode patterns formed on a plurality of sheets, and the internal electrode patterns have a non-conductive region in at least a portion of an area corresponding to the via.
    Type: Application
    Filed: March 17, 2016
    Publication date: September 22, 2016
    Inventors: In Kil PARK, Tae Hyung NOH, Gyeong Tae KIM, Myung Ho LEE, Tae Geun SEO, Min Soo LEE, Song Yeon LEE
  • Patent number: 9431988
    Abstract: The present disclosure relates to a stacked chip device including a first stack unit comprising a plurality of electrode patterns respectively disposed for a unit device region and common electrode patterns formed to be connected to cross the unit device regions, a second stack unit disposed on a top portion of the first stack unit and comprising a plurality of first conductor patterns, and a third stack unit disposed on a bottom portion of the first stack unit and comprising a plurality of second conductor patterns, wherein the first and second conductor patterns are formed on a plurality of sheets, the first and second conductor patterns formed on one sheet are formed across a plurality of unit device regions, and the first and second conductor patterns are connected vertically through vias formed penetrating through at least some of the sheets.
    Type: Grant
    Filed: January 28, 2015
    Date of Patent: August 30, 2016
    Assignee: INNOCHIPS TECHNOLOGY CO., LTD.
    Inventors: In Kil Park, Tae Hyung Noh, Gyeong Tae Kim, Tae Geun Seo, Myung Ho Lee, Min Soo Lee
  • Publication number: 20150214916
    Abstract: The present disclosure relates to a stacked chip device including a first stack unit comprising a plurality of electrode patterns respectively disposed for a unit device region and common electrode patterns formed to be connected to cross the unit device regions, a second stack unit disposed on a top portion of the first stack unit and comprising a plurality of first conductor patterns, and a third stack unit disposed on a bottom portion of the first stack unit and comprising a plurality of second conductor patterns, wherein the first and second conductor patterns are formed on a plurality of sheets, the first and second conductor patterns formed on one sheet are formed across a plurality of unit device regions, and the first and second conductor patterns are connected vertically through vias formed penetrating through at least some of the sheets.
    Type: Application
    Filed: January 28, 2015
    Publication date: July 30, 2015
    Inventors: In Kil PARK, Tae Hyung NOH, Gyeong Tae KIM, Tae Geun SEO, Myung Ho LEE, Min Soo LEE