Abstract: A reference voltage generation circuit includes a loading block suitable for generating a reference current and first and second mirroring currents obtained by mirroring the reference current based on a power source voltage, a biasing block suitable for generating a first bias voltage controlled corresponding to variations in the power source voltage and a second bias voltage controlled corresponding to variations in temperature based on the first mirroring current, a compensation block suitable for compensating for the reference current based on the first and second bias voltages, and an output load block suitable for generating a reference voltage which corresponds to the reference current based on the second mirroring current.

Abstract: An electronic device including a plurality of antennas is provided. The electronic device includes a first radiator including at least one matching block that is connected with a ground area and at least one side of the first radiator. The first radiator is configured to transmit and receive a first frequency signal through a first antenna resonance length corresponding to a first area of the first radiator, and to transmit and receive a second frequency signal through a second antenna resonance length corresponding to a second area opposite to the first area. A second radiator is connected with the ground area and is configured to transmit and receive a third frequency signal through a third antenna resonance length corresponding to a third area adjacent to the first radiator.

Abstract: A comparison device includes a comparison block suitable for comparing an upper ramp signal or a lower ramp signal with a pixel signal, and outputting a comparison signal; a CDS block provided between a first input terminal into which the pixel signal is inputted and a negative input terminal of the comparison block, and configured to perform correlated double sampling; a second switch provided between a second input terminal into which the lower ramp signal is inputted and a positive input terminal of the comparison block; a third switch provided between a third input terminal into which the upper ramp signal is inputted and the positive input terminal of the comparison block; and a feedback control unit suitable for checking a magnitude of the pixel signal according the comparison signal and outputting a second control signal or a third control signal for controlling the second or third switch.

Abstract: A pixel power noise cancelling apparatus may include: a ramp signal generator suitable for generating a ramp signal according to control of a controller; a pixel power noise copy unit suitable for copying a pixel power noise of a pixel column of a pixel array to superimpose on the ramp signal fed from the ramp signal generator to the pixel column and output a ramp signal with added pixel power noise; and a comparator suitable for comparing a pixel signal output by the pixel column with the ramp signal with added pixel power noise from the pixel power noise copy unit.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a pixel array suitable for outputting a pixel signal corresponding to incident light; a row decoder suitable for selecting and controlling pixels in the pixel array by row lines; a tracking voltage generator suitable for generating a tracking voltage; a plurality of successive approximation register (SAR) analog-to-digital converters suitable for analog-to-digital converting a pixel signal by repeatedly performing N times (where N is a natural number representing desired resolution) a process of comparing the pixel signal generated by the pixel array with the tracking voltage generated by the tracking voltage generator and modulating the pixel signal; and a control unit suitable for controlling operations of the row decoder, the tracking voltage generator, and the plurality of SAR analog-to-digital converters.

Abstract: A complementary metal oxide semiconductor (CMOS) image sensor includes a pixel array suitable for outputting a pixel signal corresponding to incident light; a row decoder suitable for selecting and controlling pixels in the pixel array by row lines; a tracking voltage generator suitable for generating a tracking voltage; a plurality of successive approximation register (SAR) analog-to-digital converters suitable for analog-to-digital converting a pixel signal by repeatedly performing N times (where N is a natural number representing desired resolution) a process of comparing the pixel signal generated by the pixel array with the tracking voltage generated by the tracking voltage generator and modulating the pixel signal; and a control unit suitable for controlling operations of the row decoder, the tracking voltage generator, and the plurality of SAR analog-to-digital converters.

Abstract: A level shifter includes an input control unit suitable for outputting an output control signal according to a pulse width of a data signal and a pulse width of an input control signal; and an output control unit suitable for controlling an output driving signal according to the output control signal.

Abstract: A formaldehyde detecting apparatus includes a formaldehyde sensor configured to measure concentration of formaldehyde in air; a printed circuit board on which the formaldehyde sensor is disposed, the printed circuit board including a signal processor configured to process a signal output from the formaldehyde sensor; a fixing member disposed on the printed circuit board, the fixing member configured to fix the formaldehyde sensor, wherein the fixing member prevents the formaldehyde sensor from oscillating with respect to the printed circuit board by external vibration; and a power supply configured to supply a voltage capable of stabilizing an output signal to the signal processor.

Abstract: A pixel signal readout device includes a unit pixel including a drive transistor and a reset transistor; and a column select transistor suitable for outputting a voltage applied to one terminal thereof, to a common terminal of the drive transistor and the reset transistor through the other terminal thereof, in response to a column select control signal applied to a gate terminal thereof.

Abstract: A comparator includes: a comparison block suitable for comparing a pixel signal and a plurality of ramp signals; a correlated double sampling (CDS) block operatively coupled among a first input terminal receiving a first ramp signal used for first and third steps, a third input terminal receiving the pixel signal, and a negative input terminal of the comparison block, and suitable for performing CDS; a switch coupled between a second input terminal receiving a second ramp signal used for a second step and a positive input terminal of the comparison block; a capacitor coupled between a ground terminal and the positive input terminal of the comparison block; an amplification block suitable for buffering a comparison signal outputted from the comparison block; and a feedback control unit suitable for generating a control signal for controlling the switch based on the buffered comparison signal.

Abstract: A circuit for reading-out a voltage variation of a floating diffusion area includes a reference capacitor suitable for causing a voltage variation of the floating diffusion area based on a charge transfer signal and a read-out block including the floating diffusion area, and suitable for initializing the floating diffusion area, performing a read-out on an initial voltage of the floating diffusion area and performing a read-out on a varied voltage of the floating diffusion area caused by the reference capacitor.

Abstract: A pixel signal transfer device includes a transfer block suitable for transferring a pixel output voltage according to an amount of a charge generated from a pixel; a correction block suitable for correcting the pixel output voltage using a threshold voltage of an amplification transistor; and a conversion gain adjusting block including the amplification transistor, the conversion gain adjusting block being suitable for adjusting a conversion gain of the corrected pixel output voltage outputted from the correction block.

Abstract: A methane (CH4) gas is synthesized from carbon dioxide (CO2) and hydrogen (H2) using catalyst-dielectric barrier discharge (DBD) plasma at room temperature and atmospheric pressure. In the method and apparatus for synthesizing methane gas of the invention, methane (CH4) gas, which is synthetic natural gas, can be effectively synthesized only from carbon dioxide (CO2) and hydrogen (H2) using DBD plasma at room temperature and atmospheric pressure, and also, additional heating and pressurization devices are not used during the methane gas synthesis process, thus reducing production costs and realizing high-value-added processing due to the absence of risks during the processing.

Abstract: An analog-digital converting device includes a comparison block generating at least one first comparison signal by comparing pixel signals with each other, and for generating second comparison signals by comparing each of the plurality of pixel signals with a ramp signal through a single ramping operation; a feedback control unit determining a data conversion sequence according to the at least one first comparison signal received from the comparison block, and outputting a control signal according to the determined data conversion sequence; a selection block selecting two of the plurality of the pixel signals or at least one of the plurality of the pixel signals and the ramp signal to be applied to the comparison block according to the control signal received from the feedback control unit; and a data conversion unit performing a data conversion on the plurality of pixel signals based on the second comparison signal.

Abstract: A reference voltage generation circuit includes a loading block suitable for generating a reference current and first and second mirroring currents obtained by mirroring the reference current based on a power source voltage, a biasing block suitable for generating a first bias voltage controlled corresponding to variations in the power source voltage and a second bias voltage controlled corresponding to variations in temperature based on the first mirroring current, a compensation block suitable for compensating for the reference current based on the first and second bias voltages, and an output load block suitable for generating a reference voltage which corresponds to the reference current based on the second mirroring current.

Abstract: An amplification circuit includes a first amplification block suitable for primarily amplifying a voltage difference between a first voltage and a second voltage corresponding to a first input current and a second input current, respectively, and a second amplification block suitable for secondarily amplifying the voltage difference between the first and second voltages to generate an amplification signal.

Abstract: An analog-to-digital conversion method may include: generating an initial comparison signal by comparing a pixel signal of a comparison column to a pixel signal of an adjacent column; generating a control signal for selecting a ramp signal according to the generated initial comparison signal; and performing data conversion by comparing the ramp signal selected according to the generated control signal to a difference between adjacent first and second pixel signals.

Abstract: A comparison device includes; a comparison block suitable for comparing a pixel signal with a reference voltage including a ramp-up signal and a ramp-down signal; a correlated double sampling (CDS) block suitable for performing a correlated double sampling operation on the pixel signal; a first switch suitable for selectively inputting the ramp-up signal as the reference voltage based on a first switch control signal; a second switch suitable for selectively inputting the ramp-down signal as the reference voltage based on a second switch control signal; and a feedback control unit suitable for generating the first and second switch control signals based on a result of the comparison during an initialization operation.

Abstract: A comparator includes: a comparison block suitable for comparing a pixel signal and a plurality of ramp signals; a correlated double sampling (CDS) block operatively coupled among a first input terminal receiving a first ramp signal used for first and third steps, a third input terminal receiving the pixel signal, and a negative input terminal of the comparison block, and suitable for performing CDS; a switch coupled between a second input terminal receiving a second ramp signal used for a second step and a positive input terminal of the comparison block; a capacitor coupled between a ground terminal and the positive input terminal of the comparison block; an amplification block suitable for buffering a comparison signal outputted from the comparison block; and a feedback control unit suitable for generating a control signal for controlling the switch based on the buffered comparison signal.

Abstract: This technology relates a unit pixel and an operating method thereof and a CMOS image sensor using the same. The unit pixel may include a photo sensitive device; a reset transistor; a selection transistor including a gate terminal, a first terminal and a second terminal, suitable for operating in response to a selection control signal applied to the gate terminal and outputting a voltage applied to the first terminal to a first terminal of the reset transistor through the second terminal; and a drive transistor including a first terminal coupled to the second terminal of the selection transistor, a second terminal and a gate terminal, suitable for generating an electrical signal corresponding to charges accumulated in a floating diffusion node coupled to the gate terminal, and outputting the electrical signal as a pixel signal through the second terminal.