Abstract: Compositions comprising a reverse-temperature sensitive hydrogel comprising a biopolymer such as a polysaccharide and a synthetic polymer, and a compound in an amount that reversibly inhibits respiratory enzyme complex I, and methods of using the composition, are provided.

Abstract: A method to prevent, inhibit or treat intervertebral disc disease in a mammal and compositions useful in that regard are provided.

Abstract: Compositions comprising a reverse-temperature sensitive hydrogel comprising a biopolymer such as a polysaccharide and a synthetic polymer, and a compound in an amount that reversibly inhibits respiratory enzyme complex I, and methods of using the composition, are provided.

Abstract: Compositions comprising a reverse-temperature sensitive hydrogel comprising a biopolymer such as a polysaccharide and a synthetic polymer, and a compound in an amount that reversibly inhibits respiratory enzyme complex I, and methods of using the composition, are provided.

Abstract: Compositions comprising a reverse-temperature sensitive hydrogel comprising a biopolymer such as a polysaccharide and a synthetic polymer, and a compound in an amount that reversibly inhibits respiratory enzyme complex I, and methods of using the composition, are provided.

Abstract: Compositions comprising a reverse-temperature sensitive hydrogel comprising a biopolymer such as a polysaccharide and a synthetic polymer, and a compound in an amount that reversibly inhibits respiratory enzyme complex I, and methods of using the composition, are provided.

Abstract: A system is described for long-term controlled release delivery of a drug or a therapeutic agent. According to the invention, one or more drugs or therapeutic agents contained in microspheres are mixed with a temperature sensitive hydrogel which is then introduced directly to the desired situs of the drug or therapeutic agent. The temperature sensitive hydrogel may also contain a drug or a therapeutic agent, for example, a pain relieving drug, for a short-term controlled release. The temperature sensitive hydrogel is in liquid state at room temperature, but upon injection, shortly becomes gelatinous. This system is particularly suitable for treatment of diseases, disorders, or conditions, for example, tumors, discogenic back pain, or arthritis, warranting localized administration of a drug or a therapeutic agent. In addition, the specification provides a method for production of a drug- or therapeutic agent-containing microspheres.

Abstract: A system is described for long-term controlled release delivery of a drug or a therapeutic agent. According to the invention, one or more drugs or therapeutic agents contained in microspheres are mixed with a temperature sensitive hydrogel which is then introduced directly to the desired situs of the drug or therapeutic agent. The temperature sensitive hydrogel may also contain a drug or a therapeutic agent, for example, a pain relieving drug, for a short-term controlled release. The temperature sensitive hydrogel is in liquid state at room temperature, but upon injection, shortly becomes gelatinous. This system is particularly suitable for treatment of diseases, disorders, or conditions, for example, tumors, discogenic back pain, or arthritis, warranting localized administration of a drug or a therapeutic agent. In addition, the specification provides a method for production of a drug- or therapeutic agent-containing microspheres.

Abstract: The methods and compositions disclosed herein describes a solution containing at least one block co-polymer that is a liquid at lower temperatures and transitions to a gel at higher temperatures. The compositions are useful, for example, as an alternative to saline or silicone-gel as fillers for prostheses.

Abstract: A semiconductor device includes a pair of first source/drain regions disposed on a silicon substrate. A first silicon epitaxial layer pattern defines a gate forming region that exposes the silicon substrate between the pair of first source/drain regions. A first gate insulation layer is disposed on the silicon substrate in the gate forming region. A second gate insulation layer is disposed on a sidewall of the first silicon epitaxial layer pattern. A second silicon epitaxial layer pattern is disposed in the gate forming region and on the first silicon epitaxial layer pattern. A pair of second source/drain regions is disposed on the second silicon epitaxial layer pattern. A third gate insulation layer exposes the second silicon epitaxial layer pattern in the gate forming region and covers the pair of second source/drain regions. A gate is disposed on the second silicon epitaxial layer pattern in the gate forming region.

Abstract: The present invention provides an implant consisting of a biodegradable magnesium-based alloy or partially applied with the magnesium-based alloy, and a method for manufacturing the same. The implant according to the present invention is biodegradable, in which its biodegradation rate can be easily controlled, and the implant has excellent strength and interfacial strength to an osseous tissue.

Abstract: A semiconductor device may include a semiconductor substrate having a recessed surface, a gate insulating layer formed on the recessed surface of the semiconductor substrate, a gate electrode formed on the gate insulating layer, and a source/drain area formed at both sides of the gate electrode, according to embodiments.

Abstract: A method of manufacturing a high voltage semiconductor device including forming a P-type region implanted with P-type impurities and an N-type region implanted with N-type impurities in a silicon substrate. The method further includes forming a silicon nitride layer pattern and a pad oxide layer pattern to expose a surface of the silicon substrate, forming a trench by etching the exposed silicon substrate using the silicon nitride layer pattern as an etch mask, forming a trench oxide layer pattern in the trench by removing the silicon nitride layer pattern and the pad oxide layer pattern, and simultaneously forming a deep P-well and a deep N-well by driving P-type impurities in the P-type region and N-type impurities in the N-type region into the silicon substrate, while forming a gate oxide layer on a silicon substrate including the trench oxide layer pattern.

Abstract: A semiconductor device includes a pair of first source/drain regions disposed on a silicon substrate. A first silicon epitaxial layer pattern defines a gate forming region that exposes the silicon substrate between the pair of first source/drain regions. A first gate insulation layer is disposed on the silicon substrate in the gate forming region. A second gate insulation layer is disposed on a sidewall of the first silicon epitaxial layer pattern. A second silicon epitaxial layer pattern is disposed in the gate forming region and on the first silicon epitaxial layer pattern. A pair of second source/drain regions is disposed on the second silicon epitaxial layer pattern. A third gate insulation layer exposes the second silicon epitaxial layer pattern in the gate forming region and covers the pair of second source/drain regions. A gate is disposed on the second silicon epitaxial layer pattern in the gate forming region.

Abstract: A semiconductor device includes a pair of first source/drain regions disposed on a silicon substrate. A first silicon epitaxial layer pattern defines a gate forming region that exposes the silicon substrate between the pair of first source/drain regions. A first gate insulation layer is disposed on the silicon substrate in the gate forming region. A second gate insulation layer is disposed on a sidewall of the first silicon epitaxial layer pattern. A second silicon epitaxial layer pattern is disposed in the gate forming region and on the first silicon epitaxial layer pattern. A pair of second source/drain regions is disposed on the second silicon epitaxial layer pattern. A third gate insulation layer exposes the second silicon epitaxial layer pattern in the gate forming region and covers the pair of second source/drain regions. A gate is disposed on the second silicon epitaxial layer pattern in the gate forming region.

Abstract: A semiconductor device having a vertical gate and method of manufacturing the same are disclosed. An example semiconductor device includes a pair of first source/drain regions formed apart from each other by a predetermined distance on a silicon substrate, a first silicon epitaxial layer formed on the pair of first source/drain regions, a vertical gate insulation layer formed at both sidewalls of the first silicon epitaxial layer, and a second silicon epitaxial layers formed on the first silicon epitaxial layer and on the gate insulation layer. The example device includes a pair of second source/drain regions formed in the second silicon epitaxial layer formed on the first silicon epitaxial layer, at positions above the pair of first source/drain regions, and a plurality of vertical gates respectively connected to the second silicon epitaxial layer formed on the gate insulation layer and to the pair of second source/drain regions.

Abstract: A semiconductor device may include a semiconductor substrate having a recessed surface, a gate insulating layer formed on the recessed surface of the semiconductor substrate, a gate electrode formed on the gate insulating layer, and a source/drain area formed at both sides of the gate electrode, according to embodiments.

Abstract: A semiconductor device having a vertical gate and method of manufacturing the same are disclosed. An example semiconductor device includes a pair of first source/drain regions formed apart from each other by a predetermined distance on a silicon substrate, a first silicon epitaxial layer formed on the pair of first source/drain regions, a vertical gate insulation layer formed at both sidewalls of the first silicon epitaxial layer, and a second silicon epitaxial layers formed on the first silicon epitaxial layer and on the gate insulation layer. The example device includes a pair of second source/drain regions formed in the second silicon epitaxial layer formed on the first silicon epitaxial layer, at positions above the pair of first source/drain regions, and a plurality of vertical gates respectively connected to the second silicon epitaxial layer formed on the gate insulation layer and to the pair of second source/drain regions.

Abstract: A semiconductor device having a vertical gate and method of manufacturing the same are disclosed. An example semiconductor device includes a pair of first source/drain regions formed apart from each other by a predetermined distance on a silicon substrate, a first silicon epitaxial layer formed on the pair of first source/drain regions, a vertical gate insulation layer formed at both sidewalls of the first silicon epitaxial layer, and a second silicon epitaxial layers formed on the first silicon epitaxial layer and on the gate insulation layer. The example device includes a pair of second source/drain regions formed in the second silicon epitaxial layer formed on the first silicon epitaxial layer, at positions above the pair of first source/drain regions, and a plurality of vertical gates respectively connected to the second silicon epitaxial layer formed on the gate insulation layer and to the pair of second source/drain regions.

Abstract: The methods and compositions disclosed herein describes a solution containing at least one block co-polymer that is a liquid at lower temperatures and transitions to a gel at higher temperatures. The compositions are useful, for example, as an alternative to saline or silicone-gel as fillers for prostheses.