Abstract: A TFT array panel is provided, including an insulating substrate, gate lines horizontally provided on the insulating substrate, data lines isolated from the gate lines and intersecting the gate lines, a pixel electrode in a pixel region defined by intersecting the gate lines and data lines, a TFT for transmitting or intercepting an image signal transmitted through the plurality of data lines to the pixel electrode in response to a scanning signal transmitted from the plurality of gate lines, a transmission gate for distributing the image signal input from an input line to the plurality of data lines, and a repair line intersecting the input line of the transmission gate. Therefore, since the input repair line and the input line of the transmission gate are intersected, a parasitic capacitance occurring between the repair line and the input line of the transmission gate can be reduced.

Abstract: An amplifier includes a biasing section, first and second differential amplifying sections and an output section. The biasing section outputs first and second bias currents based on first and second power source voltages. The first differential amplifying section outputs a first amplified voltage based on the first bias current. The second differential amplifying section outputs a second amplified voltage based on the second bias current. The output section outputs the second power source voltage based on the first amplified voltage and the first power source voltage, and outputs the first power source voltage based on the second amplified voltage and the second power source voltage. Therefore, a variation of the threshold voltage is compensated to enhance display quality.

Abstract: A display device is provided, which includes, a substrate, a plurality of gate lines formed on the substrate, a gate driver disposed on the substrate and transmitting gate signals to the gate lines, a repair gate driver disposed on the substrate and having a structure substantially the same as that of the gate driver, and a signal line coupled to the gate driver and the repair gate driver and transmitting at least one control signal to the gate driver.

Abstract: An amplifier includes a biasing section, first and second differential amplifying sections and an output section. The biasing section outputs first and second bias currents based on first and second power source voltages. The first differential amplifying section outputs a first amplified voltage based on the first bias current. The second differential amplifying section outputs a second amplified voltage based on the second bias current. The output section outputs the second power source voltage based on the first amplified voltage and the first power source voltage, and outputs the first power source voltage based on the second amplified voltage and the second power source voltage. Therefore, a variation of the threshold voltage is compensated to enhance display quality.

Abstract: A thin film transistor array panel is provided. The array panel includes a storage capacitance that is substantially uniform, and allows for a relatively large capacitance in a relatively small area.

Abstract: A liquid crystal display includes first to third voltage lines disposed along an edge of the panel unit in a ring shape, fourth to sixth voltage lines disposed along an edge of the panel unit in a ring shape and at outer sides of the first to third voltage lines, respectively, a first diode unit including a first diode group connected in series between the second voltage line and the fifth voltage line wherein the first diode group includes a plurality of diodes, and a second diode unit including a second diode group connected in series between the third voltage line and the sixth voltage line wherein the second diode group includes a plurality of diodes. One end of each of the data lines is connected between the first diode group and the other end thereof is connected between the second diode group via the transmission gate.

Abstract: A level shifter includes: a voltage dividing unit receiving a first voltage and an input voltage, and generating a middle voltage between the first voltage and the input voltage; first and second voltage compensating units connected to the voltage dividing unit and connected between the first voltage and a second voltage, for compensating a voltage variation of the voltage dividing unit; and an output unit receiving an output from the voltage dividing unit and generating an output voltage.

Abstract: A displaying apparatus includes a first substrate having a first orientation film, a second substrate having a second orientation film corresponding to the first orientation film, oppositely facing the first substrate, and a sealant having at least a part overlapped with circumferential regions of the orientation films, the sealant adhering the first substrate to the second substrate, wherein, in one exemplary embodiment, the circumferential regions of the orientation films overlapped with the sealant are formed with protrusions along planar directions of the substrates, thus providing a displaying apparatus having an excellent adherence between substrates and preventing a display region from being narrowed.

Abstract: A display device includes a circuit board provided with signal lines, a first and a second panel unit separately attached to the circuit board and each provided with pixels comprising switching elements, and a driving circuit chip mounted on the circuit board and driving the first and the second panel units.

Abstract: An analog buffer, display device having the same and a method of drving the same are provided. The analog buffer applies an analog voltage to a load. The analog buffer includes a comparator and a transistor. The comparator is configured to compare an input voltage provided from an external device with the analog voltage applied to the load. The transistor is turned on to electrically charge the load when the analog voltage is lower than the input voltage or turned on to electrically discharge the load when the analog voltage is higher than the input voltage, and turned off when the analog voltage becomes substantially the same as the input voltage.

Abstract: A TFT array panel is provided, including an insulating substrate, gate lines horizontally provided on the insulating substrate, data lines isolated from the gate lines and intersecting the gate lines, a pixel electrode in a pixel region defined by intersecting the gate lines and data lines, a TFT for transmitting or intercepting an image signal transmitted through the plurality of data lines to the pixel electrode in response to a scanning signal transmitted from the plurality of gate lines, a transmission gate for distributing the image signal input from an input line to the plurality of data lines, and a repair line intersecting the input line of the transmission gate. Therefore, since the input repair line and the input line of the transmission gate are intersected, a parasitic capacitance occurring between the repair line and the input line of the transmission gate can be reduced.

Abstract: An amplifier includes a biasing section, first and second differential amplifying sections and an output section. The biasing section outputs first and second bias currents based on first and second power source voltages. The first differential amplifying section outputs a first amplified voltage based on the first bias current. The second differential amplifying section outputs a second amplified voltage based on the second bias current. The output section outputs the second power source voltage based on the first amplified voltage and the first power source voltage, and outputs the first power source voltage based on the second amplified voltage and the second power source voltage. Therefore, a variation of the threshold voltage is compensated to enhance display quality.

Abstract: A polycrystalline silicon TFT for an LCD and a manufacturing method thereof is disclosed. The TFT comprises an active pattern formed on a substrate, a gate insulating layer formed on the substrate including the active pattern, a gate line formed on the gate insulating layer to be crossed with the active pattern and including a gate electrode for defining the first impurity region, a second impurity region and a channel region, an insulating interlayer formed on the gate insulating layer including the gate line, a data line formed on the insulating interlayer and connected to the second impurity region through the first contact hole which is formed through the gate insulating layer and the insulating interlayer on the second impurity region and a pixel electrode formed on the same insulating interlayer as the data line and connected with the first impurity region through a second contact hole which is formed through the gate insulating layer and the insulating interlayer on the first impurity region.

Abstract: A polycrystalline silicon TFT for an LCD and a manufacturing method thereof is disclosed. The TFT comprises an active pattern formed on a substrate, a gate insulating layer formed on the substrate including the active pattern, a gate line formed on the gate insulating layer to be crossed with the active pattern and including a gate electrode for defining the first impurity region, a second impurity region and a channel region, an insulating interlayer formed on the gate insulating layer including the gate line, a data line formed on the insulating interlayer and connected to the second impurity region through the first contact hole which is formed through the gate insulating layer and the insulating interlayer on the second impurity region and a pixel electrode formed on the same insulating interlayer as the data line and connected with the first impurity region through a second contact hole which is formed through the gate insulating layer and the insulating interlayer on the first impurity region.