Patents by Inventor Tae-Hyo Ro

Tae-Hyo Ro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6825482
    Abstract: An ion implantation system for manufacturing semiconductor devices includes an ion generator, an ion extractor, an ion converter, an ion mass analyzer, an ion accelerator, an ion focusing device and an end station where a wafer is located and an ion beam is implanted, which are installed along the path of an ion beam. A first portion of the system, including the ion generator, ion extractor, ion converter, ion mass analyzer is arranged along a first horizontal layer. A remaining portion of the system is arranged along a second horizontal layer vertically removed from the first layer. As a result, floor space required for the ion implantation system is reduced, thereby lowering manufacturing costs.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: November 30, 2004
    Inventors: Sang Guen Oh, Jueng Gon Kim, Tae Hyo Ro
  • Patent number: 6596633
    Abstract: The semiconductor device comprises a silicon substrate, a first metal pattern layer which is deposited on the silicon substrate, an inter metal dielectric which is deposited on the silicon substrate including the first metal pattern layer and on which a connection hole is formed to partially expose the upper surface of the first metal pattern layer, a second metal pattern layer which is deposited on the inter metal dielectric and electrically interconnected to the first metal pattern layer by the connection hole, and a passivation layer which coats the silicon substrate including the second metal pattern layer and has an opening to partially expose the second metal pattern layer for electrically connecting the semiconductor device to external circuitry. The first metal pattern layer comprises a Ti/TiN layer, an Al layer, and a TiN layer, and the second metal pattern layer comprises a Ti layer and an Al layer.
    Type: Grant
    Filed: September 17, 2001
    Date of Patent: July 22, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Hyo Ro, Ill-Hwan Jeoun, Byung-Suk Park, Yeon-Hong Jee
  • Publication number: 20020045338
    Abstract: The semiconductor device comprises a silicon substrate, a first metal pattern layer which is deposited on the silicon substrate, an inter metal dielectric which is deposited on the silicon substrate including the first metal pattern layer and on which a connection hole is formed to partially expose the upper surface of the first metal pattern layer, a second metal pattern layer which is deposited on the inter metal dielectric and electrically interconnected to the first metal pattern layer by the connection hole, and a passivation layer which coats the silicon substrate including the second metal pattern layer and has an opening to partially expose the second metal pattern layer for electrically connecting the semiconductor device to external circuitry. The first metal pattern layer comprises a Ti/TiN layer, an Al layer, and a TiN layer, and the second metal pattern layer comprises a Ti layer and an Al layer.
    Type: Application
    Filed: September 17, 2001
    Publication date: April 18, 2002
    Inventors: Tae-Hyo Ro, Ill-Hwan Jeoun, Byung-Suk Park, Yeon-Hong Jee
  • Patent number: 6303999
    Abstract: The semiconductor device includes a silicon substrate, a first metal pattern layer which is deposited on the silicon substrate, and an inter metal dielectric which is deposited on the silicon substrate including the first metal pattern layer and on which a connection hole is formed to partially expose the upper surface of the first metal pattern layer, the connection hole having concave corner portion formed on a side thereof. A second metal pattern layer is deposited on the inter metal dielectric and electriacally interconnects to the first metal pattern layer by the connection hole. A passivation layer coats the silicon substrate including the second metal pattern layer and the concave corner portion and has an opening to partially expose the second metal pattern layer for electrically connecting the semiconductor device to external circuitry.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: October 16, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Hyo Ro, Ill-Hwan Jeoun, Byung-Suk Park, Yeon-Hong Jee
  • Patent number: 5945682
    Abstract: An ion-implantation system for a semiconductor device manufacturing line is designed to save space within the manufacturing line by dividing the system into a first part located adjacent to the manufacturing line and a second part located in the manufacturing line. The first part includes an ion source, an ion-extractor, an ion-exchanger, an ion mass analyzer, an ion accelerator, and a charge exchange and acceleration chamber. The second part includes a charge filter, and an end station on which a wafer is mounted for ion-implantation along an ion beam path. The outlet of the charge exchange and acceleration chamber may also be included in the second part of the system, which is located in the manufacturing line, where semiconductor device manufacturing actually takes place. The first part of the system, which may include the inlet and body of the charge exchange and acceleration chamber, may be located below the manufacturing line.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: August 31, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Guen Oh, Jueng Gon Kim, Tae Hyo Ro