Abstract: An array substrate includes: a trench having a depth from a surface of a substrate; a gate line, a gate electrode and a data pattern filling the respective trenches, wherein the data pattern is between the adjacent gate lines; a gate insulating layer on the gate line, the gate electrode and the data pattern, substantially flat over the substrate, and including contact holes that expose both ends of the data pattern, respectively; a data connection portion on the gate insulating layer and contacting the adjacent data patterns through the contact holes; a source electrode extending from the data connection portion, and a drain electrode spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and contacting the drain electrode through the drain contact hole.

Abstract: An array substrate includes: a trench having a depth from a surface of a substrate; a gate line, a gate electrode and a data pattern filling the respective trenches, wherein the data pattern is between the adjacent gate lines; a gate insulating layer on the gate line, the gate electrode and the data pattern, substantially flat over the substrate, and including contact holes that expose both ends of the data pattern, respectively; a data connection portion on the gate insulating layer and contacting the adjacent data patterns through the contact holes; a source electrode extending from the data connection portion, and a drain electrode spaced apart from the source electrode; a passivation layer on the source and drain electrodes and including a drain contact hole exposing the drain electrode; and a pixel electrode on the passivation layer and contacting the drain electrode through the drain contact hole.

Abstract: An array substrate for a display device and manufacturing method thereof is disclosed. The device comprises: a substrate; a gate line formed on the substrate along a first direction; a data line formed over the substrate along a second direction, wherein the data line and the gate line cross each other to define a pixel region; a thin film transistor formed in the pixel region, and having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode; a pixel electrode formed in the pixel region and connected to the drain electrode; a first auxiliary gate pattern formed over the gate line and contacting the gate line; and a first auxiliary data pattern formed over the data line and contacting the data line.

Abstract: An array substrate for a display device includes an insulation substrate, a gate line formed on the insulation substrate, a data line crossing the gate line to define a pixel area, a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode, a passivation layer covering the gate line, the data line and the thin film transistor and including a drain contact hole to expose the drain electrode, and a pixel electrode formed on the pixel area and being connected to the drain contact hole through the drain contact hole. Each of the data line, the source electrode and the drain electrode includes a lower layer having copper and an upper layer covering upper and side surfaces of the lower layer, and the upper layer is thinner than the lower layer.

Abstract: The present invention provides device and method for forming a thin film pattern which can maintain an extent of wetting of a printing liquid at a proper state without time dependence. The device for forming a thin film includes a printing liquid supply unit for supplying printing liquid, a cliché having a depressed pattern and a relieved pattern for patterning the printing liquid, a printing roller for having the printing liquid supplied from the printing liquid supply unit thereto coated thereon and being rolled on the cliché and the substrate, and a solvent supply unit for supplying a solvent to the printing liquid before the printing liquid coated on the printing roller is brought into contact with the cliché.

Abstract: The present invention relates to a printing apparatus and method for forming a thin film pattern using the printing apparatus which can form a multi-layered thin film pattern on a substrate.

Abstract: An array substrate for a display device includes an insulation substrate, a gate line formed on the insulation substrate, a data line crossing the gate line to define a pixel area, a thin film transistor including a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode, a passivation layer covering the gate line, the data line and the thin film transistor and including a drain contact hole to expose the drain electrode, and a pixel electrode formed on the pixel area and being connected to the drain contact hole through the drain contact hole. Each of the data line, the source electrode and the drain electrode includes a lower layer having copper and an upper layer covering upper and side surfaces of the lower layer, and the upper layer is thinner than the lower layer.

Abstract: Disclosed are layers and patterns of nanowire or nanotube using a chemical self assembly for forming a semiconductor layer and a conductive layer of a thin film transistor by using a nanowire and/or nanotube solution and an diamine-based self-assembled monolayer (SAM) material. The Layers and patterns including layers and patterns of nanowire or nanotube using a chemical self assembly include: a substrate having a surface terminated with amine group (—NH2) by using a chemical self-assembled monolayer (SAM) material having at least one end terminated with amine group(—NH2); and a first nanowire or nanotube layer ionically coupled to the amine group (—NH2) of the surface of the substrate.

Abstract: An array substrate for a display device and manufacturing method thereof is disclosed. The device comprises: a substrate; a gate line formed on the substrate along a first direction; a data line formed over the substrate along a second direction, wherein the data line and the gate line cross each other to define a pixel region; a thin film transistor formed in the pixel region, and having a gate electrode connected to the gate line, a source electrode connected to the data line, and a drain electrode; a pixel electrode formed in the pixel region and connected to the drain electrode; a first auxiliary gate pattern formed over the gate line and contacting the gate line; and a first auxiliary data pattern formed over the data line and contacting the data line.

Abstract: A thin film transistor (TFT) including a nanowire semiconductor layer having nanowires aligned in one direction in a channel region is disclosed. The nanowire semiconductor layer is selectively formed in the channel region. A method for fabricating the TFT, a liquid crystal display (LCD) device using the TFT, and a method for manufacturing the LCD device are also disclosed. The TFT fabricating method includes forming alignment electrodes on the insulating film such that the alignment electrodes face each other, to define a channel region, forming an organic film, to expose the channel region, coating a nanowire-dispersed solution on an entire surface of a substrate including the organic film, forming a nanowire semiconductor layer in the channel region by generating an electric field between the alignment electrodes such that nanowires of the nanowire semiconductor layer are aligned in a direction, and removing the organic film.

Abstract: Disclosed are layers and patterns of nanowire or nanotube using a chemical self assembly for forming a semiconductor layer and a conductive layer of a thin film transistor by using a nanowire and/or nanotube solution and an diamine-based self-assembled monolayer (SAM) material. The Layers and patterns including layers and patterns of nanowire or nanotube using a chemical self assembly include: a substrate having a surface terminated with amine group (—NH2) by using a chemical self-assembled monolayer (SAM) material having at least one end terminated with amine group(—NH2); and a first nanowire or nanotube layer ionically coupled to the amine group (—NH2) of the surface of the substrate.

Abstract: The present invention provides device and method for forming a thin film pattern which can maintain an extent of wetting of a printing liquid at a proper state without time dependence. The device for forming a thin film includes a printing liquid supply unit for supplying printing liquid, a cliché having a depressed pattern and a relieved pattern for patterning the printing liquid, a printing roller for having the printing liquid supplied from the printing liquid supply unit thereto coated thereon and being rolled on the cliché and the substrate, and a solvent supply unit for supplying a solvent to the printing liquid before the printing liquid coated on the printing roller is brought into contact with the cliché.

Abstract: Disclosed are layers and patterns of nanowire or nanotube using a chemical self assembly for forming a semiconductor layer and a conductive layer of a thin film transistor by using a nanowire and/or nanotube solution and an diamine-based self-assembled monolayer (SAM) material. The Layers and patterns including layers and patterns of nanowire or nanotube using a chemical self assembly include: a substrate having a surface terminated with amine group (—NH2) by using a chemical self-assembled monolayer (SAM) material having at least one end terminated with amine group (—NH2); and a first nanowire or nanotube layer ionically coupled to the amine group (—NH2) of the surface of the substrate.

Abstract: The present invention relates to a printing apparatus and method for forming a thin film pattern using the printing apparatus which can form a multi-layered thin film pattern on a substrate.

Abstract: A thin film transistor (TFT) including a nanowire semiconductor layer having nanowires aligned in one direction in a channel region is disclosed. The nanowire semiconductor layer is selectively formed in the channel region. A method for fabricating the TFT, a liquid crystal display (LCD) device using the TFT, and a method for manufacturing the LCD device are also disclosed. The TFT fabricating method includes forming alignment electrodes on the insulating film such that the alignment electrodes face each other, to define a channel region, forming an organic film, to expose the channel region, coating a nanowire-dispersed solution on an entire surface of a substrate including the organic film, forming a nanowire semiconductor layer in the channel region by generating an electric field between the alignment electrodes such that nanowires of the nanowire semiconductor layer are aligned in a direction, and removing the organic film.

Abstract: A method of manufacturing a thin film transistor includes: forming a gate insulating layer on a substrate having a gate electrode; forming a semiconductor layer of nanomaterial on the gate insulating layer; forming a source electrode and a drain electrode on the gate insulating layer; and applying a voltage to the source electrode and the drain electrode to arrange a direction of the nanomaterial.

Abstract: A thin film transistor (TFT) including a nanowire semiconductor layer having nanowires aligned in one direction in a channel region is disclosed. The nanowire semiconductor layer is selectively formed in the channel region. A method for fabricating the TFT, a liquid crystal display (LCD) device using the TFT, and a method for manufacturing the LCD device are also disclosed. The TFT fabricating method includes forming alignment electrodes on the insulating film such that the alignment electrodes face each other, to define a channel region, forming an organic film, to expose the channel region, coating a nanowire-dispersed solution on an entire surface of a substrate including the organic film, forming a nanowire semiconductor layer in the channel region by generating an electric field between the alignment electrodes such that nanowires of the nanowire semiconductor layer are aligned in a direction, and removing the organic film.

Abstract: Disclosed are layers and patterns of nanowire or nanotube using a chemical self assembly for forming a semiconductor layer and a conductive layer of a thin film transistor by using a nanowire and/or nanotube solution and an diamine-based self-assembled monolayer (SAM) material. The Layers and patterns including layers and patterns of nanowire or nanotube using a chemical self assembly include: a substrate having a surface terminated with amine group (—NH2) by using a chemical self-assembled monolayer (SAM) material having at least one end terminated with amine group (—NH2); and a first nanowire or nanotube layer ionically coupled to the amine group (—NH2) of the surface of the substrate.

Abstract: A thin film transistor (TFT) including a nanowire semiconductor layer having nanowires aligned in one direction in a channel region is disclosed. The nanowire semiconductor layer is selectively formed in the channel region. A method for fabricating the TFT, a liquid crystal display (LCD) device using the TFT, and a method for manufacturing the LCD device are also disclosed. The TFT fabricating method includes forming alignment electrodes on the insulating film such that the alignment electrodes face each other, to define a channel region, forming an organic film, to expose the channel region, coating a nanowire-dispersed solution on an entire surface of a substrate including the organic film, forming a nanowire semiconductor layer in the channel region by generating an electric field between the alignment electrodes such that nanowires of the nanowire semiconductor layer are aligned in a direction, and removing the organic film.

Abstract: A method of manufacturing a thin film transistor includes: forming a gate insulating layer on a substrate having a gate electrode; forming a semiconductor layer of nanomaterial on the gate insulating layer; forming a source electrode and a drain electrode on the gate insulating layer; and applying a voltage to the source electrode and the drain electrode to arrange a direction of the nanomaterial.