Abstract: An image sensor includes a plurality of row lines extending in a first direction, a plurality of column lines including a plurality of first column lines and a plurality of second column lines, the plurality of column lines intersects the plurality of row lines, and a plurality of pixels arranged along the plurality of row lines and the plurality of column lines, the plurality of pixels includes a plurality of pixel groups, each of the plurality of pixel groups includes two or more pixels. Each pixel includes a first photoelectric element, a second photoelectric element, a first pixel circuit connected to the first photoelectric element, and a second pixel circuit connected to the second photoelectric element. In each pixel group, the first pixel circuits share one of the plurality of first column lines and the second pixel circuits share one of the plurality of second column lines.

Abstract: The present invention relates to a technology which enables a desired shape to be freely represented using sculpture components in a three-dimensional space filled with a transparent material. The present invention is characterized in that, when a sculpture is manufactured by installing, in a three-dimensional space, a text, a picture, a model, and a real object consisting of at least one of points, lines, surfaces, and solids, the shape of the sculpture can be freely represented using a transparent carrier containing at least one of the text, the picture, the model, and the real object, and a transparent carrier serving as a fixing means.

Abstract: In a method of manufacturing a vertical semiconductor device, an insulation layer and a sacrificial layer are alternatively and repeatedly formed on a substrate to define a structure. The structure is etched to form a hole therethrough that exposes the substrate. A first semiconductor pattern is formed in a lower portion of the hole, and a blocking pattern, a charge storage pattern, a tunnel insulation pattern and a first channel pattern are formed on a sidewall of the hole. A second channel pattern is formed on the first channel pattern and the semiconductor pattern, and a second semiconductor pattern is formed on a portion of the second channel pattern on the semiconductor pattern to define an upper channel pattern including the second channel pattern and the second semiconductor pattern. The sacrificial layers are replaced with a plurality of gates, respectively, including a conductive material.

Abstract: Back end of the line precision resistors that allow for high currents and for configuration as an eFuse by embedding a single thin film high resistive metal material within a dielectric layer, wherein the resisters are coupled to sidewalls of adjacent metal interconnects are described. The resistors can be formed in the metal one (M1) dielectric layer and can be coupled to sidewalls of the M1 interconnects. Also described are processes for fabricating integrated circuits including the resistors and/or e-Fuses.

Abstract: The invention generally relates to articles and methods of making thereof. More specifically, the invention generally relates to articles comprising a substrate embedded with particles, and having at least one etched surface exposing at least a portion of particles. Methods of making these articles are also disclosed. This abstract is intended as a scanning tool for purposes of searching in the particular art and is not intended to be limiting of the present invention.

Abstract: The present invention relates generally to a substrate for an optical device, an optical device package, a manufacturing method of the substrate for the optical device, and a manufacturing method of the optical device package. More particularly, the present invention relates to a substrate for an optical device, an optical device package, a manufacturing method of the substrate for the optical device, and a manufacturing method of the optical device package, in which the optical device to be mounted self-aligns, thus improving mounting precision of the optical device, and also reflection efficiency is prevented from being reduced.

Abstract: A semiconductor device and a method of forming the same, the semiconductor device including an insulating structure having an opening; a conductive pattern disposed in the opening; a barrier structure covering a bottom surface of the conductive pattern, the barrier structure extending between the conductive pattern and side walls of the opening; and a nucleation structure disposed between the conductive pattern and the barrier structure. The nucleation structure includes a first nucleation layer that contacts the barrier structure, and a second nucleation layer that contacts the conductive pattern, and a top end portion of the second nucleation layer is higher than a top end portion of the first nucleation layer.

Abstract: A display device. A display including a display panel configured to include a plurality of active pixels and a plurality of dummy pixels, which are formed near the active pixels, a control driver configured to control a pixel driving circuit formed in each of the active pixels and a dummy driving circuit formed in each of the dummy pixels, wherein each of the pixel driving circuits of the active pixels includes a pixel driving transistor and each of the dummy driving circuits of the dummy pixels, which are formed at either end of the display panel in a first direction, is electrically connected at a first dummy node thereof and includes a dummy driving transistor and a first dummy capacitor, which connects a control terminal of the dummy driving transistor and the first dummy node.

Abstract: A system and method for providing location-based personalized information by using user location history information, whereby battery consumption of a computing device is reduced. The computing device includes: a location finder configured to obtain user location information of a user of the computing device; a display configured to display information indicating a route of the user of the computing device; and a controller configured to track a location of the user by controlling the location finder as the controller senses a change in the location of the user based on the obtained user location information, obtain information corresponding to an initial route of the user based on the tracked location of the user, detect a predicted route of the user from user location history information based on the information corresponding to the initial route of the user, and display on the display unit the predicted route.

Abstract: The memory controller includes a command generator generating first read commands respectively corresponding to each of a plurality of read voltages having different levels and transferring the first read commands to a memory device so that first read operation is performed plural times on a plurality of memory cells for each of the read voltages, and an inverted cell counter determining inverted cells showing different bit values during the first read operation performed plural times for each read voltage on the basis of read result data received from the memory device.

Abstract: An electroluminescent device and a display device including the same are disclosed. The electroluminescent device includes a first electrode, an electron transport layer disposed on the first electrode and including inorganic oxide particles, a self-assembled monolayer disposed on the electron transport layer, an emission layer disposed on the self-assembled monolayer and including light emitting particles, a hole transport layer disposed on the emission layer, and a second electrode disposed on the hole transport layer.

Abstract: A semiconductor device and a method for fabricating the same are provided. A semiconductor device having a substrate can include a lower semiconductor layer, an upper semiconductor layer on the lower semiconductor layer, and a buried insulating layer between the lower semiconductor layer and the upper semiconductor layer. A first trench can be in the upper semiconductor layer having a lowest surface above the buried insulating layer and a first conductive pattern recessed in the first trench. A second trench can be in the lower semiconductor layer, the buried insulating layer, and the upper semiconductor layer. A second conductive pattern can be in the second trench and a first source/drain region can be in the upper semiconductor layer between the first conductive pattern and the second conductive pattern.

Abstract: A scan driver includes stage circuits, each including: a first circuit including a control terminal (CT) connected to a first node (N1), and connecting/disconnecting a previous scan line of a previous stage circuit to a second node (N2) based on a control signal (CS); a second circuit including a CT connected to a clock signal line, and connecting one of a first power voltage line (FPVL) and a second power voltage line (SPVL) to the N1 based on a CS; a third circuit including a CT connected to the N2, and connecting one of the N1 and the SPVL to a third node (N3) based on a CS; a fourth circuit including a CT connected to the N3, and connecting one of the FPVL and the SPVL to a current scan line based on a CS; and a first capacitor connecting the CT of the third circuit and the SPVL.

Abstract: An antenna module includes an insulating substrate; a first antenna wiring including a first spiral wiring disposed on the insulating substrate and having a first portion disposed adjacent to an edge of the insulating substrate, and a second spiral wiring disposed on the insulating substrate and spaced apart from the first spiral wiring; and a magnetic part disposed on one surface of the insulating substrate and disposed to overlap a second portion of the first spiral wiring that is adjacent to the second spiral wiring without overlapping the first portion of the first spiral wiring.

Abstract: The present invention relates to a 5th-generation (5G) or pre-5G communication system to be provided for supporting a data transmission rate higher than that of a 4th-generation (4G) communication system, such as long term evolution (LTE), and subsequent systems. According to the present invention, a method of a transmitting apparatus includes transmitting, to a receiving apparatus, reference signals through m antenna ports; and transmitting, to the receiving apparatus, the reference signals through n antenna ports, wherein each of the m antenna ports has a first polarization characteristic, each of the n antenna ports has a second polarization characteristic, the m antenna ports are included in a first axis of a two-dimensional space generated based on a vertical axis and a horizontal axis of a uniform planar array (UPA) antenna, and the n antenna ports are included in a second axis of the two-dimensional space.

Abstract: A liquid crystal display includes a first base substrate, a second base substrate, an electrode part, and a liquid crystal layer. The second base substrate is disposed opposite to the first base substrate. The electrode part is disposed on at least one of the first base substrate and the second base substrate. The liquid crystal layer is disposed between the first base substrate and the second base substrate. The liquid crystal layer includes a liquid crystal composition. The liquid crystal composition includes at least one kind of liquid crystal compounds including a cyclopentadienyl group.

Abstract: A cloaking device includes an object-side, an image-side, a cloaked region (CR) between the object-side and the image-side, and a reference optical axis extending from the object-side to the image-side. An object-side CR reflection boundary, an object-side half-mirror, and an object-side color filter are positioned on the object side and an image-side CR reflection boundary, an image-side half-mirror, and an image-side color filter are positioned on the image-side. The object-side half-mirror and the object-side color filter are spaced apart from and positioned generally parallel to the object-side CR reflection boundary, and the image-side half-mirror and the image-side color filter are spaced apart from and positioned generally parallel to the image-side CR reflection boundary. Light from an object located on the object-side of the cloaking device and obscured by the CR propagates via three optical paths to form an image of the object on the image-side of the cloaking device.

Abstract: A semiconductor device includes a substrate including a cell array region and a peripheral circuit region. The semiconductor device further includes a cell array disposed in the cell array region and including a plurality of cell strings connected to a bit line. The bit line extends in a first direction. The semiconductor device additionally includes a first cell row disposed in the peripheral circuit region and including a plurality of first cells arranged in a second direction crossing the first direction. The first and second directions being parallel to an upper surface of the substrate. The semiconductor device further includes a plurality of first interconnect lines each having a longitudinal axis in the first direction and connected to the plurality of first cells, and a plurality of first power lines extending in the second direction and connected to the plurality of first cells through the first interconnect lines.

Abstract: According to an aspect of the present disclosure, there is provided an electric caliper brake including a carrier at which a pair of pad plates are installed to be movable forward and backward, and a caliper housing slidably installed at the carrier and provided with a cylinder in which a piston having a concave cup-shaped interior is installed to be movable forward and backward by a braking hydraulic pressure, the electric caliper brake comprising: a power converter provided with a spindle member installed to pass through a rear portion of the cylinder and rotated by receiving a rotational force from an actuator, and a nut member configured with a rod screw-coupled to the spindle member and disposed inside the piston and a head portion formed to extend from the rod in a radial direction to be in contact with the piston; and a blocking member having one end installed at the piston and the other end installed at the rod and configured to seal an inner space of the piston.