Patents by Inventor Tae Jin NAM

Tae Jin NAM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250151297
    Abstract: Method of forming pn heterojunction between nickel oxide and gallium oxide disclosed. The method includes forming a trench by etching an n-type gallium oxide epitaxial layer epitaxially grown on an n-type gallium oxide substrate using an etch mask, forming a p-type nickel oxide region on the bottom of the trench by sputtering a nickel oxide target on the n-type gallium oxide epitaxial layer in a mixed gas atmosphere of argon and oxygen, and forming a nickel layer on the p-type nickel oxide region by sputtering a nickel target on the n-type gallium oxide epitaxial layer in an argon gas atmosphere.
    Type: Application
    Filed: December 16, 2022
    Publication date: May 8, 2025
    Applicant: POWER CUBESEMI INC.
    Inventors: Tai Young KANG, Sin Su KYOUNG, Tae Jin NAM, Yu Sup JUNG
  • Publication number: 20250048664
    Abstract: A method for adjusting a channel length of silicon carbide MOSFET includes depositing a buffer layer and a poly-silicon layer on a first conductivity type epitaxial layer having a plurality of second conductivity type bases, etching the poly-silicon layer to form a poly-silicon pattern, depositing a spacer layer on the poly-silicon pattern and exposed buffer layer to a first deposition thickness, forming a first width of spacers of the poly-silicon pattern by dry etching the spacer layer, forming a pair of first conductivity type source regions on the second conductivity type bases by ion implantation into a first pattern mask formed on the buffer layer, forming a second conductivity type source region on the second conductivity type bases by implanting ions into a second pattern mask, and forming a gate electrode on a first channel extending from the first conductivity type source region to the first conductivity type epitaxial layer.
    Type: Application
    Filed: August 2, 2024
    Publication date: February 6, 2025
    Applicant: POWER CUBESEMI INC.
    Inventors: Tai Young KANG, Sin Su KYOUNG, Tae Jin NAM
  • Publication number: 20230178662
    Abstract: Silicon carbide junction barrier Schottky diode disclosed. Silicon carbide junction barrier Schottky diode includes a first conductivity-type substrate, a first conductivity-type epitaxial layer, being formed by epitaxial growth of silicon carbide doped with a first conductivity-type impurity on the first conductivity-type substrate, a charge injection region, being formed on the first conductivity-type epitaxial layer and doped at a concentration of the first conductivity-type impurity higher than that of the first conductivity-type epitaxial layer, a second conductivity-type junction region, being formed on the first conductivity-type epitaxial layer so as to contact the charge injection region, a Schottky metal layer, being formed on the charge injection region and the second conductivity-type junction region, an anode electrode, being formed on the Schottky metal layer, and a cathode electrode, being formed under the first conductivity-type substrate.
    Type: Application
    Filed: May 6, 2021
    Publication date: June 8, 2023
    Inventors: Sin Su KYOUNG, Tae Jin NAM, Eun Ha KIM, Jeong Yun SEO, Tai Young KANG