Patents by Inventor Tae-jin Yoo

Tae-jin Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136993
    Abstract: A rendering method of an object-based audio signal and an apparatus for performing the same are provided. The rendering method of an object-based audio signal includes obtaining a rendered audio signal, performing clipping prevention on the rendered audio signal using a first limiter, mixing a signal output by the first limiter using a mixer, and performing clipping prevention on the mixed signal using a second limiter.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 25, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Ju LEE, Jae-hyoun YOO, Dae Young JANG, Soo Young PARK, Young Ho JEONG, Kyeongok KANG, Tae Jin LEE
  • Publication number: 20240129682
    Abstract: A method of rendering object-based audio and an electronic device performing the method are provided. The method includes identifying a bitstream, determining a reference distance of an object sound source based on the bitstream, determining a minimum distance for applying distance-dependent attenuation, based on the reference distance, and determining a gain of object-based audio included in the bitstream based on the reference distance and the minimum distance.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 18, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Ju LEE, Jae-hyoun YOO, Dae Young JANG, Soo Young PARK, Young Ho JEONG, Kyeongok KANG, Tae Jin LEE
  • Publication number: 20170256667
    Abstract: Disclosed herein is a photodetector utilizing graphene. A single-layer graphene channel is formed on a semiconductor substrate doped with n-type impurity. The graphene channel has an end connected to a source electrode and is physically separated from a drain electrode. Light having passed through a gate insulation layer and a gate electrode generates electron-hole pairs at the interface between the graphene channel and the semiconductor substrate forming a Schottky junction, and a photocurrent is generated by a Schottky barrier. In addition, the Schottky barrier is changed according to an applied gate voltage, thereby changing the photocurrent.
    Type: Application
    Filed: February 23, 2017
    Publication date: September 7, 2017
    Inventors: Byoung Hoon LEE, Kyoung Eun CHANG, Tae Jin YOO, Hyeon Jun HWANG
  • Patent number: 7698586
    Abstract: A portable system, method thereof, and a power consumption controller for controlling power consumption in a portable system are described. The portable system may include a storage unit, a module processing data, and a controller regulating power supplied to the module. The controller may regulate the module to perform a backup operation when a power saving mode begins and to interrupt the power after the backup operation is completed.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: April 13, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Won-Tae Kim, Sam-Yong Bahng, Tae-Jin Yoo, Jong-Keun Ahn, Yong-Ji Kim, Sang-Hee Lee, Min-Soo Kang
  • Publication number: 20060174144
    Abstract: A portable system, method thereof, and a power consumption controller for controlling power consumption in a portable system are described. The portable system may include a storage unit, a module processing data, and a controller regulating power supplied to the module. The controller may regulate the module to perform a backup operation when a power saving mode begins and to interrupt the power after the backup operation is completed.
    Type: Application
    Filed: January 20, 2006
    Publication date: August 3, 2006
    Inventors: Won-Tae Kim, Sam-Yong Bahng, Tae-Jin Yoo, Jong-Keun Ahn, Yong-Ji Kim, Sang-Hee Lee, Min-Soo Kang
  • Patent number: 6392909
    Abstract: A semiconductor memory device having a fixed CAS latency during a normal operation and various CAS latencies during a test mode. The semiconductor memory device a master signal generator for generating a master signal in response to a power-up signal and a latency test signal. A plurality of fuse information units generate fuse information signals in response to the power-up signal and the master signal. A plurality of mode register set (MRS) address information units receive address bits during an interval where an address window signal is activated to generate MRS address latch signals in response to a MRS addressing signal. A CAS latency determining unit generates CAS latency select signals in response to the fuse information signals and the MRS address latch signals, wherein the CAS latency select signals provide a fixed CAS latency during a normal mode of operation of the semiconductor device and varying CAS latencies during a test mode of operation of the semiconductor device.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: May 21, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-seong Jang, Tae-jin Yoo
  • Publication number: 20020034115
    Abstract: A semiconductor memory device having a fixed CAS latency during a normal operation and various CAS latencies during a test mode. The semiconductor memory device a master signal generator for generating a master signal in response to a power-up signal and a latency test signal. A plurality of fuse information units generate fuse information signals in response to the power-up signal and the master signal. A plurality of mode register set (MRS) address information units receive address bits during an interval where an address window signal is activated to generate MRS address latch signals in response to a MRS addressing signal. A CAS latency determining unit generates CAS latency select signals in response to the fuse information signals and the MRS address latch signals, wherein the CAS latency select signals provide a fixed CAS latency during a normal mode of operation of the semiconductor device and varying CAS latencies during a test mode of operation of the semiconductor device.
    Type: Application
    Filed: March 27, 2001
    Publication date: March 21, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Tae-Seong Jang, Tae-Jin Yoo