Patents by Inventor Tae-Kyun Kim

Tae-Kyun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020123189
    Abstract: There is disclosed a method of manufacturing a transistor in a semiconductor device. The present invention forms a Ta film or a TaNx film at a low temperature or forms a first TaNx film in which the composition(x) of nitrogen is 0.45˜0.55, on a gate insulating film in a NMOS region, so that the work function becomes 4.0˜4.4 eV, and also forms a Ta film or a TaNx film at a high temperature or forms a second TaNx film in which the composition(x) of nitrogen is 0.6˜1.4 is formed, on a gate insulating film in a PMOS region, so that the work function becomes 4.8˜5.2 eV. Thus, the present invention can lower the threshold voltage by implementing a surface channel CMOS device both in the NMOS region and the PMOS region.
    Type: Application
    Filed: June 25, 2001
    Publication date: September 5, 2002
    Inventors: Tae Ho Cha, Se Aug Jang, Tae Kyun Kim, Dae Gyu Park, In Seok Yeo, Jin Won Park
  • Patent number: 6440028
    Abstract: A manual valve body is provided with a first port communicated with a regulator valve via a pressure line, a second port connected to a first pressure control valve and a second fail safe valve so as to supply hydraulic pressure thereto at range “P”, a third port connected to the regulator valve, an N-R control valve, and first and second switch valves so as to supply the hydraulic pressure from the first port thereto at range “R”, a fourth port connected to second and third pressure control valves and the first and second switch valves so as to supply the hydraulic pressure from the first valve thereto at ranges “2”, “3”, and “D”, and a fifth port connected to the first switch valve so as to supply the hydraulic pressure from the first port thereto at range “L”.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: August 27, 2002
    Assignee: Hyundai Motor Company
    Inventors: Tae-Kyun Kim, Jae-Duk Jang, Jong-Sool Park, Hyun-Soo Shim, Jin-Hee Lee, Chang-Wook Lee
  • Patent number: 6436775
    Abstract: The MOSFET fabrication method allows application of a self-aligned contact (SAC) process while maintaining a metal gate, such as a tungsten gate, to have a uniform thickness. The process involves forming a metal oxide film during the formation of a metal gate structure of the MOSFET device. The metal oxide film is formed by subjecting the gate structure through a rapid thermal oxidation (RTO) treatment and then to an N2O plasma treatment. The treatments allow the thickness of the metal oxide to be precisely controlled. The metal oxide acts as an insulator, which prevents electrical shorts between the gate structure and a contact plug even if a misalignment of occurs during the SAC process. This is an improvement from the conventional practice of separately forming a SAC barrier film after the formation of the metal gate structure and thus saves money, time, and increases reliability and productivity. Also the performance characteristics of the device is enhanced.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: August 20, 2002
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Tae Kyun Kim, Se Aug Jang, In Seok Yeo
  • Patent number: 6417055
    Abstract: The present invention relates to a method for forming a gate electrode in a semiconductor device that is more tolerant of misalignment during contact formation processing. The improved gate structure reduces the formation of shorts between the gate electrode and subsequently formed conductors such as DRAM bit lines and storage lines. The gate electrode is formed from a damascene metal gate electrode having adjacent insulating spacers by partially etching the metal gate electrode to form a trench; depositing a nitride film; and etching the nitride film to form additional protective insulators above outer portions of the gate electrodes. With these protective insulators in place, subsequent contact processing becomes more tolerant of misalignment, reducing rework and improving yield.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: July 9, 2002
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Se Aug Jang, Tae Kyun Kim, In Seok Yeo
  • Publication number: 20020086445
    Abstract: A method for fabricating a dual metal gate structure for a semiconductor device uses a damascene process to form a second gate in addition to a single gate process for forming a first gate. After a semiconductor substrate having a PMOS region and an NMOS region formed therein is provided, a first gate insulating layer and a first metal layer are formed on the substrate and patterned. Thus, the first gate is formed in a first region, either the PMOS region or the NMOS region, and a dummy gate is formed in a second region. Next, a spacer is formed on each sidewall of the first gate and the dummy gate, and a source/drain region is formed in the substrate adjacent each side of the first gate and the dummy gate. Then, a dielectric layer is formed on the resultant structure and polished to expose the first metal layer, and the dummy gate is removed to expose a portion of the substrate in the second region.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 4, 2002
    Inventors: Tae Kyun Kim, Se Aug Jang, Tae Ho Cha, In Seok Yeo
  • Publication number: 20020083986
    Abstract: A manual valve of a hydraulic pressure control system for an automatic transmission of a vehicle according to the present invention comprises a valve body provided with a line pressure receiving port, a P/N range port for supplying hydraulic pressure in more than one range of parking range P and neutral range N, a plurality of hydraulic pressure supplying ports and a plurality of exhaust ports; and a valve spool slidably inserted into the valve body and having a plurality of valve lands, a first valve land of said plurality of valve lands having a exhaust groove depressed toward a neighboring land, wherein:
    Type: Application
    Filed: August 14, 2001
    Publication date: July 4, 2002
    Inventors: Jong-Sool Park, Chang-Wook Lee, Jae-Ho Cho, Jae-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee
  • Publication number: 20020086504
    Abstract: A method of manufacturing semiconductor devices forms a surface channel CMOSFET in the process of manufacturing a metal gate. The method forms a (TixAly)1-zNz film (where z ranges from about 0.0 to about 0.2) having a work function value ranging from about 4.2 to about 4.3 eV on a gate insulating film in a NMOS region, a (TixAly)1-zNz film (where z ranges from about 0.3 to about 0.6) having a work function value ranging from about 4.8 to about 5.0 eV on the gate insulating film in a pMOS region, thus implementing a surface channel CMOS device both in the nMOS region and the pMOS region. Therefore, the threshold voltage is reduced.
    Type: Application
    Filed: December 27, 2001
    Publication date: July 4, 2002
    Inventors: Dae Gyu Park, Tae Ho Cha, Se Aug Jang, Heung Jae Cho, Tae Kyun Kim, Kwan Yong Lim, In Seok Yeo, Jin Won Park
  • Publication number: 20020086756
    Abstract: This invention provides a hydraulic control system for controlling a power train including four clutches and two brakes, wherein a first pressure controlled by a first solenoid valve is selectively supplied to two clutches of the power train under control of a first switch valve, a second pressure controlled by a second control valve is selectively supplied to another clutch and a first brake of the power train under control of a second switch valve, hydraulic pressure from a port of a manual valve is supplied to yet another clutch via a control valve, hydraulic pressure from another port of the manual valve is supplied to a second brake via another control valve, and the two control valves are controlled by a third solenoid valve.
    Type: Application
    Filed: December 20, 2001
    Publication date: July 4, 2002
    Inventors: Jong-Sool Park, Chang-Wook Lee, Joon-Bae Kim, Jae-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee
  • Publication number: 20020086758
    Abstract: Disclosed is a hydraulic control system for controlling an automatic transmission comprising a first clutch for transmitting power through a one-way clutch in first, second and third speeds; a fourth clutch for discontinuing an operation of the one-way clutch and which acts as an engine brake; a second brake operating in second and fourth speeds; a second clutch for transmitting power in third and fourth speeds; a first brake for discontinuing the operation of the one-way clutch in the first speed and acting as an engine brake, and operating in low L and reverse R ranges; and a third clutch for operating in the reverse R range, wherein hydraulic pressure controlled by a first solenoid valve is supplied and exhausted through operation of a switch valve to the second clutch and the first brake, the second brake is directly controlled by hydraulic pressure controlled by a second solenoid valve, and the fourth clutch is directly controlled by hydraulic pressure controlled by a third solenoid valve.
    Type: Application
    Filed: November 19, 2001
    Publication date: July 4, 2002
    Inventors: Jong-Sool Park, Chang-Wook Lee, Jae-Ho Cho, Jae-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee
  • Publication number: 20020086762
    Abstract: Disclosed is a hydraulic control system for an automatic transmission that controls a powertrain, which includes a first friction element for use as an engine brake for discontinuing operation of a one-way clutch in the transmission and a second friction element operating only when the first friction element is disengaged. The hydraulic control system comprises a manual valve including a forward range port for exhausting hydraulic pressure when driving in a forward range, and an L range port for exhausting hydraulic pressure for low speed control; and a switch valve controlled by engine brake signal pressure, solenoid pressure, and forward range pressure supplied from the forward range port, the switch valve selectively supplying control pressure to the first friction element and the second friction element.
    Type: Application
    Filed: December 20, 2001
    Publication date: July 4, 2002
    Inventors: Jong-Sool Park, Chang-Wook Lee, Joon-Bae Kim, Jae-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee
  • Publication number: 20020082131
    Abstract: A line pressure regulating system for an automatic transmission comprises a regulator valve that regulates a line pressure by being provided with a hydraulic pressure from an oil pump, wherein the regulator valve is controlled such that a resultant force of a variable control pressure and an elastic member makes an equilibrium with a resultant force of the line pressure and a range pressure that is provided in all ranges except the R range.
    Type: Application
    Filed: December 26, 2001
    Publication date: June 27, 2002
    Inventors: Jong-Sool Park, Chang-Wook Lee, Jac-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee, Hyun-Soo Shim
  • Publication number: 20020058374
    Abstract: A method of forming dual-metal gates in a semiconductor device, including the steps of providing a semiconductor substrate having a PMOS area and an NMOS area wherein dummy gates are formed in the PMOS and NMOS areas respectively, forming an insulating interlayer on the semiconductor substrate so as to cover the dummy gates, polishing the insulating interlayer until the dummy gates are exposed, forming a first groove defining a first metal gate area by selectively removing one of the dummy gates formed in the PMOS and NMOS areas, forming a first gate insulating layer and a first metal layer on an entire area of the semiconductor substrate including the first groove successively, forming a first metal gate in the first groove by etching the first metal layer and first gate insulating layer until the insulating interlayer is exposed, forming a second groove defining a second metal gate area by removing the remaining dummy gate, forming a second gate insulating layer and a second metal layer on the entire area o
    Type: Application
    Filed: October 18, 2001
    Publication date: May 16, 2002
    Inventors: Tae-Kyun Kim, Tae ho Cha, Jeong Youb Lee, Se Aug Jang
  • Publication number: 20020058372
    Abstract: A method of forming a semiconductor device gate including the steps of forming a dummy gate insulating layer on a semiconductor substrate having an isolating field oxide layer, successively depositing a dummy gate silicon layer and a hard mask layer on the dummy gate insulating layer, forming a hard mask layer and patterning the dummy gate silicon layer using the mask pattern as an etch barrier, forming a thermal oxide layer at both sidewalls of the dummy gate silicon layer by thermal oxidation on the resultant structure, forming spacers at both sidewalls of the dummy gate silicon layer, depositing an insulating interlayer on the resultant structure, polishing the insulating interlayer to expose the dummy gate silicon layer, forming a damascene structure by removing the dummy gate silicon and insulating layers, depositing a gate insulating layer and a gate metal layer on an entire surface of the semiconductor substrate having the damascene structure, and polishing the gate metal and insulating layers, thereby
    Type: Application
    Filed: November 7, 2001
    Publication date: May 16, 2002
    Inventors: Se Aug Jang, Tae Kyun Kim, Jae Young Kim, In Seok Yeo
  • Publication number: 20020057882
    Abstract: The present invention relates to fluorinated polyethers having a fluorinated aliphatic group at a main chain as represented by the formula (1), as well as a waveguide fabricated using the same: 1
    Type: Application
    Filed: September 28, 2001
    Publication date: May 16, 2002
    Applicant: ZEN PHOTONICS CO. LTD.
    Inventors: Tae Kyun Kim, Ji Hyang Kim
  • Publication number: 20020025874
    Abstract: A hydraulic control system for an automatic transmission includes a first clutch acting as an input element at first, second, and third forward speed ranges, a second clutch acting as the input element at third and fourth forward speed ranges, a third clutch acting as the input element at an R range, a fourth clutch operating at P, R, N, and L range for performing an engine brake function by stopping a one-way clutch at the first, second, and third forward speed ranges, a first brake acting as a response element at the P, R, N, and L ranges, a second brake acting as a response element at second and fourth forward speed ranges, a first switch valve for distributing hydraulic pressure controlled by a first solenoid valve to a damper clutch in a torque converter and to clutch control valves for the first clutch, and a second switch valve for distributing hydraulic pressure controlled by a second solenoid valve to the second clutch and the first brake.
    Type: Application
    Filed: August 8, 2001
    Publication date: February 28, 2002
    Inventors: Chang-Wook Lee, Jong-Sool Park, Jae-Ho Cho, Jae-Duk Jang, Tae-Kyun Kim, Jin-Hee Lee
  • Publication number: 20020009866
    Abstract: The present invention relates to a method for forming a gate electrode in a semiconductor device that is more tolerant of misalignment during contact formation processing. The improved gate structure reduces the formation of shorts between the gate electrode and subsequently formed conductors such as DRAM bit lines and storage lines. The gate electrode is formed from a damascene metal gate electrode having adjacent insulating spacers by partially etching the metal gate electrode to form a trench; depositing a nitride film; and etching the nitride film to form additional protective insulators above outer portions of the gate electrodes. With these protective insulators in place, subsequent contact processing becomes more tolerant of misalignment, reducing rework and improving yield.
    Type: Application
    Filed: July 2, 2001
    Publication date: January 24, 2002
    Applicant: Hynix Semiconductor Inc.
    Inventors: Se Aug Jang, Tae Kyun Kim, In Seok Yeo
  • Publication number: 20020001892
    Abstract: In the method of fabrication a structure is formed on a semiconductor substrate. The structure includes a tungsten silicide film. A contact hole is formed in the structure, and an oxidation process is conducted such that if a portion of the tungsten silicide film is exposed by the contact hole, a silicon oxide film is formed on the exposed portion of the tungsten silicide film.
    Type: Application
    Filed: June 21, 2001
    Publication date: January 3, 2002
    Inventor: Tae Kyun Kim
  • Publication number: 20020000629
    Abstract: The MOSFET fabrication method allows application of a self-aligned contact (SAC) process while maintaining a metal gate, such as a tungsten gate, to have a uniform thickness. The process involves forming a metal oxide film during the formation of a metal gate structure of the MOSFET device. The metal oxide film is formed by subjecting the gate structure through a rapid thermal oxidation (RTO) treatment and then to an N2O plasma treatment. The treatments allow the thickness of the metal oxide to be precisely controlled. The metal oxide acts as an insulator, which prevents electrical shorts between the gate structure and a contact plug even if a misalignment of occurs during the SAC process. This is an improvement from the conventional practice of separately forming a SAC barrier film after the formation of the metal gate structure and thus saves money, time, and increases reliability and productivity. Also the performance characteristics of the device is enhanced.
    Type: Application
    Filed: June 20, 2001
    Publication date: January 3, 2002
    Inventors: Tae Kyun Kim, Se Aug Jang, In Seok Yeo
  • Publication number: 20020001891
    Abstract: Disclosed is a method for fabricating a MOSFET device (and the MOSFET device itself) having a metal gate capable of forming an ultra shallow junction and allowing application of a self-aligned contact as a following process.
    Type: Application
    Filed: June 20, 2001
    Publication date: January 3, 2002
    Inventors: Tae Kyun Kim, Dae Hee Weon
  • Publication number: 20010056004
    Abstract: A line pressure control system of an automatic transmission includes a hydraulic pump for generating hydraulic pressure, a regulator valve for adjusting the pressure from the hydraulic pump to a predetermined level, a torque converter control valve for adjusting a partial pressure from the regulator valve, a damper clutch valve receiving the adjusted pressure from the torque converter control valve for feeding the pressure to a damper clutch, a damper clutch solenoid valve for controlling the damper clutch valve, a reducing valve for reducing a partial pressure from the regulator valve and then supplying the reduced pressure to the damper clutch control valve, wherein the regulator valve includes a valve body, first and second valve spools coaxially inserted into the valve body, a sleeve encapsulating the second valve spool, and a coil spring interposed between the first and the second valve spools.
    Type: Application
    Filed: December 29, 2000
    Publication date: December 27, 2001
    Inventors: Tae-Kyun Kim, Jae-duk Jang, Jong-Sool Park, Hyun-Soo Shim, Jin-Hee Lee, Chang-Wook Lee