Abstract: Proposed is a precursor composition for forming a metal film including a zirconium compound represented by any one of Chemical Formulas 1 to 3 and a hafnium compound represented by any one of Chemical Formulas 4 to 6.

Abstract: A transistor having a source region and a drain region which are separately formed in a substrate, a trench which is defined in the substrate between the source region and the drain region, and a gate electrode which is formed in the trench. The gate electrode includes a first electrode buried over a bottom of the trench; a second electrode formed over the first electrode; and a liner electrode having an interface part which is positioned between the first electrode and the second electrode and a side part, which is positioned on sidewalls of the second electrode and overlaps with the source region and the drain region.

Abstract: A transistor may include a source region and a drain region separately formed in a substrate, a trench defined in the substrate between the source region and the drain region, and a buried gate electrode formed. The buried gate electrode includes a high work function liner layer having a bottom portion which is positioned over a bottom of the trench and sidewall portions which are positioned on lower sidewalls of the trench; a low work function liner layer positioned on upper sidewalls of the trench, and overlapping with the source region and the drain region; and a low resistance layer contacting the high work function liner layer and the low work function liner layer, and partially filling the trench.

Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

Abstract: A transistor having a source region and a drain region which are separately formed in a substrate, a trench which is defined in the substrate between the source region and the drain region, and a gate electrode which is formed in the trench. The gate electrode includes a first electrode buried over a bottom of the trench; a second electrode formed over the first electrode; and a liner electrode having an interface part which is positioned between the first electrode and the second electrode and a side part, which is positioned on sidewalls of the second electrode and overlaps with the source region and the drain region.

Abstract: A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a second junction region over the vertical channel region; a gate trench exposing side surfaces of the pillar; a gate dielectric layer covering the gate trench; and a gate electrode embedded in the gate trench, with the gate dielectric layer interposed therebetween. The gate electrode includes a first work function liner overlapping with the vertical channel region, and including an aluminum-containing metal nitride; a second work function liner overlapping with the second junction region, and including a silicon-containing non-metal material; and an air gap positioned between the second work function liner and the second junction region.

Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

Abstract: A transistor having a source region and a drain region which are separately formed in a substrate, a trench which is defined in the substrate between the source region and the drain region, and a gate electrode which is formed in the trench. The gate electrode includes a first electrode buried over a bottom of the trench; a second electrode formed over the first electrode; and a liner electrode having an interface part which is positioned between the first electrode and the second electrode and a side part, which is positioned on sidewalls of the second electrode and overlaps with the source region and the drain region.

Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

Abstract: A transistor includes a substrate having an active region defined by an isolation layer; a first trench defined in the active region and a second trench defined in the isolation layer; a fin region formed under the first trench; and a buried gate electrode covering sidewalls of the fin region and filling the first and second trenches. The buried gate electrode includes a first work function layer formed on the sidewalls of the fin region; a second work function layer formed on sidewalls of the first trench and the second trench; a third work function layer positioned over the fin region and contacting the second work function layer; and a low resistance layer contacting the third work function layer and partially filling the first and second trenches.

Abstract: A semiconductor device includes junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, a first gate electrode buried in the trench and having a stepped upper surface, and a second gate electrode formed on the first gate electrode to overlap a junction region.

Abstract: A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a second junction region over the vertical channel region; a gate trench exposing side surfaces of the pillar; a gate dielectric layer covering the gate trench; and a gate electrode embedded in the gate trench, with the gate dielectric layer interposed therebetween. The gate electrode includes a first work function liner overlapping with the vertical channel region, and including an aluminum-containing metal nitride; a second work function liner overlapping with the second junction region, and including a silicon-containing non-metal material; and an air gap positioned between the second work function liner and the second junction region.

Abstract: A semiconductor device including a substrate in which a trench is formed, a first impurity region and a second impurity region formed in the substrate separated from each other by the trench, a gate electrode formed to fill a lower part of the trench, and a capping layer formed over the gate electrode to fill an upper part of the trench. The gate electrode includes a first work function liner formed over a bottom surface and sidewalls of the lower part of the trench without overlapping with the first impurity region and the second impurity region, and including an aluminum-containing metal nitride; and a second work function liner formed over the sidewalls of the lower part of the trench over the first work function liner, overlapping with the first impurity region and the second impurity region, and including a silicon-containing non-metal material.

Abstract: A semiconductor device includes junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, a first gate electrode buried in the trench and having a stepped upper surface, and a second gate electrode formed on the first gate electrode to overlap a junction region.

Abstract: A semiconductor device includes a body including a first junction region; a pillar positioned over the body, and including a vertical channel region and a second junction region over the vertical channel region; a gate trench exposing side surfaces of the pillar; a gate dielectric layer covering the gate trench; and a gate electrode embedded in the gate trench, with the gate dielectric layer interposed therebetween. The gate electrode includes a first work function liner overlapping with the vertical channel region, and including an aluminum-containing metal nitride; a second work function liner overlapping with the second junction region, and including a silicon-containing non-metal material; and an air gap positioned between the second work function liner and the second junction region.

Abstract: A transistor includes a substrate having an active region defined by an isolation layer; a first trench defined in the active region and a second trench defined in the isolation layer; a fin region formed under the first trench; and a buried gate electrode covering sidewalls of the fin region and filling the first and second trenches. The buried gate electrode includes a first work function layer formed on the sidewalls of the fin region; a second work function layer formed on sidewalls of the first trench and the second trench; a third work function layer positioned over the fin region and contacting the second work function layer; and a low resistance layer contacting the third work function layer and partially filling the first and second trenches.

Abstract: A transistor includes a substrate having an active region defined by an isolation layer; a first trench defined in the active region and a second trench defined in the isolation layer; a fin region formed under the first trench; and a buried gate electrode covering sidewalls of the fin region and filling the first and second trenches. The buried gate electrode includes a first work function layer formed on the sidewalls of the fin region; a second work function layer formed on sidewalls of the first trench and the second trench; a third work function layer positioned over the fin region and contacting the second work function layer; and a low resistance layer contacting the third work function layer and partially filling the first and second trenches.

Abstract: A semiconductor device includes junction regions formed in upper portions of both sidewalls of a trench formed in a semiconductor substrate, a first gate electrode buried in the trench and having a stepped upper surface, and a second gate electrode formed on the first gate electrode to overlap a junction region.

Abstract: A transistor includes a substrate having an active region defined by an isolation layer; a first trench defined in the active region and a second trench defined in the isolation layer; a fin region formed under the first trench; and a buried gate electrode covering sidewalls of the fin region and filling the first and second trenches. The buried gate electrode includes a first work function layer formed on the sidewalls of the fin region; a second work function layer formed on sidewalls of the first trench and the second trench; a third work function layer positioned over the fin region and contacting the second work function layer; and a low resistance layer contacting the third work function layer and partially filling the first and second trenches.

Abstract: A transistor may include a source region and a drain region separately formed in a substrate, a trench defined in the substrate between the source region and the drain region, and a buried gate electrode formed. The buried gate electrode includes a high work function liner layer having a bottom portion which is positioned over a bottom of the trench and sidewall portions which are positioned on lower sidewalls of the trench; a low work function liner layer positioned on upper sidewalls of the trench, and overlapping with the source region and the drain region; and a low resistance layer contacting the high work function liner layer and the low work function liner layer, and partially filling the trench.