Abstract: Disclosed is a motor driving apparatus including: a motor; an inverter including a switching element for driving the motor; a controller for controlling the switching element; a resolver including an excitation winding and a detection winding; and a resolver chip applying an excitation signal to the excitation winding by inputting a periodic signal from the controller, and receiving a feedback signal from the detection winding, wherein the resolver chip determines the number of rotations of the motor based on a change in a pulse width of a detection signal resulting from a comparison between a voltage of the feedback signal and a preset voltage, and output a signal to the inverter for setting an inertial driving control mode according to the number of rotations of the motor in a failure state of the controller.

Abstract: A display device includes a first substrate and a second substrate facing each other; and a filling layer disposed between the first substrate and the second substrate. The first substrate comprises a support substrate comprising a display area in which emission areas associated with sub-pixels, are arranged; a light-emitting element layer disposed on one surface of the support substrate; and an encapsulation layer disposed on the light-emitting element layer. The encapsulation layer comprises a first inorganic layer covering the light-emitting element layer; an organic layer disposed on the first inorganic layer and overlapping the light-emitting element layer; and a second inorganic layer disposed on the first inorganic layer and covering the organic layer. A thickness of the first inorganic layer is smaller than a thickness of the second inorganic layer.

Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

Abstract: A motor driving apparatus includes a motor having a plurality of windings, a first inverter which is connected to a first end of each of the plurality of windings and drives the motor, a second inverter which is connected to a second end of each of the plurality of windings and selectively drives the motor according to a motor drive mode, and a controller which generates a current command for the motor according to a torque command and a voltage utilization rate control value, determines whether to perform linearization control for the current command based on a present counter magnetic flux of the motor and a switching reference counter magnetic flux for the motor drive mode, and adjusts the voltage utilization rate control value such that a value of the current command is linearized in a section in which the linearization control is performed.

Abstract: The present disclosure relates to a system for controlling a motor of a vehicle for increasing control accuracy of the motor for driving the vehicle, and an object of the present disclosure is to provide a system for controlling a motor of a vehicle, which may accurately perform a motor control even when a battery voltage (i.e., motor voltage) applied to the motor upon the driving control of the motor is changed.

Abstract: A method of reinforcement learning of a neural network device for generating a verification vector for verifying a circuit design comprising a circuit block includes inputting a test vector to the circuit block, generating one or more rewards based on a coverage corresponding to the test vector, the coverage being determined based on a state transition of the circuit block based on the test vector, and applying the one or more rewards to a reinforcement learning.

Abstract: The present disclosure relates to a method for carrying out dose delivery quality assurance for high-precision radiation treatment, in which parameters affecting a pass rate of dose delivery quality assurance can be derived through regression analysis, which is a known statistical analysis method, and a pass rate prediction model capable of predicting each parameter and the pass rate of dose delivery quality assurance can be derived, and accordingly, it can be predicted in advance whether dose delivery quality assurance will be passed according to the parameters through the above prediction model, without repeatedly carrying out dose delivery quality assurance according to a patient's treatment plan, and as a result, the efficiency of dose delivery quality assurance can be enhanced, and the time or capacity required for such quality assurance is reduced, such that radiation treatment for an actual patient can be quickly and precisely carried out.

Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Abstract: Disclosed is an apparatus for excitation signal generation for a resolver. The apparatus includes a sine wave generator that generates a sine wave based on a square wave, an amplifier that amplifies the sine wave, a differential signal generator that converts, into a differential signal, the amplified sine wave, a driver that inputs the differential signal to a coil, and a processor that generates an excitation signal by increasing a voltage of the sine wave from a start voltage to a target voltage through at least one of the sine wave generator and the amplifier based on a transient current that flows into the coil in a transient response interval.

Abstract: A coil component is provided. The coil component includes a body having fifth and sixth surfaces opposing each other, first and second surfaces respectively connecting the fifth and sixth surfaces of the body and opposing each other, and third and fourth surfaces respectively connecting the first and second surfaces of the body and opposing each other in one direction, a recess disposed in an edge between one of the first and second surfaces of the body and the sixth surface of the body, a coil portion disposed inside the body and exposed through the recess, and an external electrode including a connection portion disposed in the recess and connected to the coil portion, and a pad portion disposed on one surface of the body. A length of the pad portion in the one direction is greater than a length of the connection portion in the one direction.

Abstract: A developing composition and a method of forming a pattern using the same are provided. According to embodiments of inventive concepts, the developing composition may include at least one repeating unit selected from a first repeating unit represented by Chemical Formula A1 a second repeating unit represented by Chemical Formula A2, or both the first repeating unit represented by Chemical Formula A1 and second repeating unit represented by Chemical Formula A2. The developing composition may further include a copolymer including a third repeating unit represented by Chemical Formula A3.

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an etch-target layer, a mask layer, a blocking layer, and a photoresist layer, which are sequentially stacked on a substrate; forming a photoresist pattern, the forming the photoresist pattern including irradiating the photoresist layer with extreme ultraviolet (EUV) light; forming a mask layer, the forming the mask layer including etching the mask layer using the photoresist pattern as an etch mask; and forming a target pattern, the forming the target pattern including etching the etch-target layer using the mask pattern as an etch mask. The photoresist layer may include an organic metal oxide. The blocking layer may be a non-polar layer and may limit and/or prevent a metallic element in the photoresist layer from infiltrating into the mask layer.

Abstract: A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.

Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.

Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

Abstract: An apparatus, a recording medium, and a method for generating a control parameter of a screen printer are disclosed. The apparatus includes a memory that stores a simulation model configured to derive predictive inspection information on a printed state of solder paste based on a plurality of control parameters of the screen printer; a communication circuit configured to receive first inspection information on a plurality of solder pastes printed by the screen printer based on a first control parameter, and a processor electrically connected to the memory and the communication circuit.

Abstract: The present disclosure relates to a transit transfer path unit structure connecting a supply/collection cassette and a banknote transfer path of an upper main body in an ATM which includes the upper main body and a lower main body and has a structure in which the supply/collection cassette is mounted on one side of the lower main body. The transit transfer path unit is disposed on one side of the upper main body of the ATM, and detachably provided between the supply/collection cassette and the banknote transfer path provided in the upper main body for separation from a banknote transfer route. Thus, the upper main body may be easily pulled to the front or rear of the ATM without any interference with the transit transfer path unit to perform the maintenance work, enhancing the convenience of the maintenance of the ATM.

Abstract: A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.

Abstract: The present disclosure relates to a transit transfer path unit structure connecting a supply/collection cassette and a banknote transfer path of an upper main body in an ATM which includes the upper main body and a lower main body and has a structure in which the supply/collection cassette is mounted on one side of the lower main body. The transit transfer path unit is disposed on one side of the upper main body of the ATM, and detachably provided between the supply/collection cassette and the banknote transfer path provided in the upper main body for separation from a banknote transfer route. Thus, the upper main body may be easily pulled to the front or rear of the ATM without any interference with the transit transfer path unit to perform the maintenance work, enhancing the convenience of the maintenance of the ATM.