Abstract: Disclosed is a hall sensor signal generating device which includes a rotor which has a magnetic property and rotates on the basis of a rotary axis; a hall sensor unit which is disposed to be spaced apart from a stator disposed outside the rotor; and a clock synchronization unit which receives a driving clock, performs synchronization between the driving clock and a hall sensor signal output from the hall sensor unit, and outputs the synchronized driving clock and the synchronized hall sensor signal.

Abstract: Provided is a voltage supply circuit using a charge pump. The voltage supply circuit enhances charge pump output voltage fluctuation characteristics depending on load variation of a charge pump voltage generator (load regulation characteristics) when receiving an operation power supply voltage of the charge pump through a regulator. The voltage supply circuit is configured to feed back fluctuation of a charge pump output voltage to a charge pump voltage regulator. The fluctuation of the charge pump output voltage is compensated through fluctuation of an output voltage of the charge pump to active enhance the load regulation characteristics.

Abstract: Disclosed is a feature vector classification device which includes an initial condition setting unit; a variable calculating unit configured to receive a training vector and to calculate an error and a weight according to setting of the initial condition setting unit; a loop deciding unit configured to determine whether re-calculation is required, based on a comparison result between the calculated error and an error threshold; and a hyperplane generating unit configured to generate a hyperplane when an end signal is received from the loop deciding unit.

Abstract: Disclosed is a sound detecting circuit which includes a sensing unit configured to generate an AC signal in response to a sound pressure level of a sound signal; an amplification unit configured to amplify the AC signal; and a bias voltage generating unit configured to generate a bias voltage to be provided to the amplification unit. The bias voltage generating unit comprises a current source configured to provide a power current; and a current-voltage converting circuit configured to convert the power current into the bias voltage and to reduce a noise due to the power current.

Abstract: Provided is an apparatus for calculating an absolute difference capable of efficiently performing an absolute difference using an adder. The apparatus for calculating an absolute difference includes a comparator comparing values of two integers, first and second selectors each selecting and outputting one of the two integers according to the comparison results of the comparator, an inverter complementing the result value selected by the second selector; and an adder adding up the result value selected by the first selector, the value complemented by the inverter, and 1.

Abstract: The present inventive concept relates to an analog-digital converter. The analog-digital converter includes a clock generating unit generating a clock signal; a clock delay adjusting unit outputting one of a first clock signal to a Kth clock signal according to a control signal; a capacitive digital-analog converting unit outputting a difference between the analog signal and a reference signal; a comparison unit judging whether an output of the capacitive digital-analog converting unit is 0, a positive number, or a negative number, in response to an output of the clock delay adjusting unit; and an SAR logic unit transferring an output of the comparison unit to the capacitive digital-analog converting unit in response to an output of the clock delay adjusting unit and performing a successive approximation operation to output the N-bit digital signal.

Abstract: Provided are an object detection device and system. The object detection device includes an outline image extraction unit, a feature vector calculation unit, and an object judgment unit. The outline image extraction unit extracts an outline image from an input image. The feature vector calculation unit calculates a feature vector from the outline image by using histogram of oriented gradients (HOG) representing a frequency distribution of gradient vectors with respect to pixels of the outline image, and pixel coordinate information varying according to a spatial distribution of the gradient vectors. The object judgment unit judges a target object corresponding to the feature vector with reference to pre-learned data.

Abstract: An image recognition device in accordance with the inventive concept may include an input vector extraction part extracting an input vector from an input image; a compression vector conversion part converting the input vector into a compression vector using a projection vector; a training parameter generation part receiving a training vector to generate a training parameter using a projection vector obtained through a folding operation of the training vector; and an image classification part classifying the compression vector using the training vector to output image recognition data.

Abstract: Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.

Abstract: Provided is a memory access device including multiple processors accessing a specific memory. The memory access device includes first and second processors, first and second transaction controllers, a memory access switch, and a memory controller. The first and second transaction controllers are connected respectively to the first and second processors. The memory access switch is connected to the first and second transaction controllers. The memory controller is connected to the memory access switch to control a memory device. Herein, if the first and second processors simultaneously access the memory device, the second processor stores an address or data in the second transaction controller while the first processor is accessing the memory device.

Abstract: Provided are a thermoelectric device, a thermoelectric device module, and a method of forming the thermoelectric device. The thermoelectric device includes a first conductive type first semiconductor nanowire including at least one first barrier region; a second conductive type second semiconductor nanowire including at least one second barrier region; a first electrode connected to one end of the first semiconductor nanowire; a second electrode connected to one end of the second semiconductor nanowire; and a common electrode connected to the other end of the first semiconductor nanowire and the other end of the second semiconductor nanowire. The first barrier region is greater than the first semiconductor nanowire in thermal conductivity, and the second barrier region is greater than the second semiconductor nanowire in thermal conductivity.

Abstract: Disclosed is an operating method of a direct memory access (DMA) controller having first and second DMA channels. The operating method includes iteratively performing a DMA transfer operation of the first DMA channel based upon loop information and transfer information of the first DMA channel; iteratively performing a DMA transfer operation of the second DMA channel based upon loop information and transfer information of the second DMA channel; reconfiguring the transfer and loop information of the first and second DMA channels; and again performing the iteratively performing a DMA transfer operation of the first DMA channel and the iteratively performing a DMA transfer operation of the first DMA channel based upon the reconfigured transfer and loop information of the first and second DMA channels.

Abstract: A vehicle safety sensor control device is provided. The vehicle safety sensor control device may include a slope sensor portion sensing a slope of vehicle; a safety sensor portion sensing running safety information for a vehicle safety running; a sensing control angle generation portion sensing a sensing control angle from the sensed slope; and a safety sensor control portion controlling up and down direction angles of the safety sensor on the basis of a horizontal plane of vehicle depending on the sensing control angle.

Abstract: Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.

Abstract: Provided is an image matching method of matching at least two images. The image matching method extracts feature points of a reference image and feature points of a target image, changes a feature point, selected from among the feature points of the reference image, to a reference point in the target image, sets a matching candidate region on the basis of the reference point, in the target image, and performs a similarity operation between the selected feature point in the reference image and a plurality of feature points included in the matching candidate region among the feature points of the target image. The image matching method decreases the number of similarity operations performed in the image matching operation, thereby guaranteeing a high-speed operation.

Abstract: Provided are an object detection device and system. The object detection device includes an outline image extraction unit, a feature vector calculation unit, and an object judgment unit. The outline image extraction unit extracts an outline image from an input image. The feature vector calculation unit calculates a feature vector from the outline image by using histogram of oriented gradients (HOG) representing a frequency distribution of gradient vectors with respect to pixels of the outline image, and pixel coordinate information varying according to a spatial distribution of the gradient vectors. The object judgment unit judges a target object corresponding to the feature vector with reference to pre-learned data.

Abstract: Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region having an upper portion of a streamlined shape (?) obtained by patterning an upper portion of a bulk silicon substrate with an embossed pattern, and having a thicker and wider area than the channel region; a nitride layer formed at both side surfaces of the single crystalline active region to expose an upper portion of the single crystalline active region at a predetermined height; and a gate electrode formed to be overlaid with the exposed upper portion of the single crystalline active region of the channel region.

Abstract: Provided is a low power consumption processor. The processor includes: a plurality of blocks; a memory storing instructions that control each of the plurality of blocks; and a multi power controller generates a signal that activates at least one of the plurality of blocks according to an address storing the instruction, and provides a normal power voltage or a reduction power voltage in response to the activation signal.

Abstract: Provided is an image recognizing method. The image recognizing method includes selecting a partial data from a standard image data, recognizing image based on the selected data, reduction-converting the selected data, and recognizing image based on the reduction-converted data.

Abstract: Provided is a vector classifier and a vector classification method. The vector classifier includes a vector compressor configured to compress an input vector; a support vector storage unit configured to store a compressed support vector; and a support vector machine operation unit configured to receive the compressed input vector and the compressed support vector and perform an arithmetic operation according to a classification determining equation.