Patents by Inventor Tae Roh

Tae Roh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7639577
    Abstract: An optical recording medium and method for recording/reproducing data on/from the optical recording medium having an optimum recording condition information, are provided. The method includes reading out a reference recording condition recorded on a specific area of the optical recording medium; recording test data while varying a recording condition with respect to the reference recording condition; determining an optimum recording power based on reproduction characteristics of the test data; and recording a recoding condition data including the optimum recording power, recording speed and write strategy type to be used or used to record data, on a specific area of the optical recording medium.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: December 29, 2009
    Assignee: LG Electronics Inc.
    Inventor: Jin-Tae Roh
  • Publication number: 20090011317
    Abstract: Disclosed is a fuel cartridge. The fuel cartridge according to the present disclosure comprises a fuel container having a first port configured to flow fuel therethrough; and a buffer module configured to be coupled to the fuel container, wherein the buffer module comprises a second port configured to engage with the first port, a tubing connection comprising a first and a second end, wherein the first end is coupled to or forms the second port, a third port coupled to or formed by the second end of the tubing connection, and a buffer container in fluid communication with the second and third ports via the tubing connection, wherein the buffer container is configured to store fuel therein when an inflow of the fuel to the buffer module is greater than an outflow from the buffer module.
    Type: Application
    Filed: May 30, 2008
    Publication date: January 8, 2009
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Seong-jin An, Yeong-chan Eun, Gill-tae Roh, Seok-rak Chang
  • Publication number: 20080299440
    Abstract: A planar fuel cell stack, having generators that generate electricity by an electrochemical reaction of a fuel and an oxidizing agent, the generators arranged on a same plane. A beading unit and a protruding portion are formed on a fastening plate and a separator so as to improve structural stiffness thereof. Accordingly, the constituent elements of the stack are fastened with a substantially uniform conjoining pressure compared to a conventional planar stack, and the thickness of the stack of the present invention can be thinner than that of the conventional planar stack.
    Type: Application
    Filed: February 27, 2008
    Publication date: December 4, 2008
    Inventors: Gill-Tae Roh, Yeong-Chan Eun, Seong-Jin An, Seok-Rak Chang, Jun-Ho Sauk
  • Publication number: 20080292927
    Abstract: The present embodiments relate to a humidity controllable cathode end plate and an air breathing fuel cell stack using the same capable of preventing stack performance degradation due to the dryness of a cathode and a membrane. The air breathing fuel cell stack according the present embodiments including: a membrane electrode assembly configured of an anode, a cathode, and an electrolyte membrane positioned between the anode and the cathode; a fuel supply unit coupled to the anode to supply fuel; and a cathode end plate coupled to the cathode so that the humidity of the cathode is maintained and including a first opening part for influxing ambient air and a second opening part for outfluxing the ambient air.
    Type: Application
    Filed: February 19, 2008
    Publication date: November 27, 2008
    Inventors: Seong-Jin An, Seok-Rak Chang, Gill-Tae Roh
  • Publication number: 20080280183
    Abstract: An end plate of an air breathing fuel cell stack and an air breathing fuel cell stack including the same. The air breathing fuel cell stack includes a membrane electrode assembly, including an anode electrode, a cathode electrode, and an electrolyte positioned between the anode electrode and the cathode electrode; and an end plate contacting the membrane electrode assembly. The end plate includes a first surface contacting the membrane electrode assembly, an opposing second surface; and a collector positioned at the first surface and contacting the cathode electrode.
    Type: Application
    Filed: February 20, 2008
    Publication date: November 13, 2008
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Yeong-chan Eun, Jun-ho Sauk, Seong-jin An, Gill-tae Roh, Seok-rak Chang
  • Publication number: 20080274389
    Abstract: A cathode end plate for a breathable fuel cell stack including a first plate including a plurality of first openings and a second plate contacting one side of the first plate and including a plurality of second openings exposing two or more first openings of the plurality of first openings.
    Type: Application
    Filed: March 27, 2008
    Publication date: November 6, 2008
    Inventors: Gill-Tae Roh, Yeong-Chan Eun, Jun-Ho Sauk, Seong-Jin An, Seok-Rak Chang
  • Publication number: 20080254332
    Abstract: A fuel cell stack includes a membrane electrode assembly including an anode electrode, a cathode electrode, and an electrolyte membrane positioned between the anode electrode and the cathode electrode; a separator including a channel for a flow of fuel and oxidant and closely adhered to the membrane electrode assembly; and a gasket with a two-layer structure stacked between the separator and the membrane electrode assembly.
    Type: Application
    Filed: February 20, 2008
    Publication date: October 16, 2008
    Applicant: Samsung SDI Co., Ltd.
    Inventors: YEONG-CHAN EUN, Seong-jin An, Jun-ho Sauk, Gill-tae Roh, Seok-rak Chang
  • Publication number: 20080038891
    Abstract: Provided are high voltage metal oxide semiconductor field effect transistor (HVMOSFET) having a Si/SiGe heterojunction structure and method of manufacturing the same. In this method, a substrate on which a Si layer, a relaxed SiGe epitaxial layer, a SiGe epitaxial layer, and a Si epitaxial layer are stacked or a substrate on which a Si layer having a well region, a SiGe epitaxial layer, and a Si epitaxial layer are stacked is formed. For the device having the heterojunction structure, the number of conduction carriers through a potential well and the mobility of the carriers increase to reduce an on resistance, thus increasing saturation current. Also, an intensity of vertical electric field decreases so that a breakdown voltage can be maintained at a very high level. Further, a reduction in vertical electric field due to the heterojunction structure leads to a gain in transconductance (Gm), with the results that a hot electron effect is inhibited and the reliability of the device is enhanced.
    Type: Application
    Filed: May 8, 2007
    Publication date: February 14, 2008
    Inventors: Young CHO, Sung KWON, Tae ROH, Dae LEE, Jong KIM
  • Publication number: 20080025173
    Abstract: According to an embodiment, an apparatus for recording data in a recording medium, includes a reading/recording unit recording or reading data on or from the recording medium, the read data including a position information, the position information indicating a last recorded position and a recordable position for new data to be recorded; and a controller examining whether or not an area corresponding to the recordable position has an already recorded data, and determining whether to change the recordable position to another position for recording the new data based on the examination result, the another position being physically separated from the recordable position indicated by the read data recording information, wherein the controller identifies another position for recording the new data if the area has the already recorded data.
    Type: Application
    Filed: July 10, 2007
    Publication date: January 31, 2008
    Inventor: Jin-Tae Roh
  • Publication number: 20070190709
    Abstract: Provided is a multiple-gate metal oxide semiconductor (MOS) transistor and a method for manufacturing the same, in which a channel is implemented in a streamline shape, an expansion region is implemented in a gradually increased form, and source and drain regions is implemented in an elevated structure by using a difference of a thermal oxidation rate depending on a crystal orientation of silicon and a geographical shape of the single-crystal silicon pattern. As the channel is formed in a streamline shape, it is possible to prevent the degradation of reliability due to concentration of an electric field and current driving capability by the gate voltage is improved because the upper portion and both sides of the channel are surrounded by the gate electrodes. In addition, a current crowding effect is prevented due to the expansion region increased in size and source and drain series resistance is reduced by elevated source and drain structures, thereby increasing the current driving capability.
    Type: Application
    Filed: March 26, 2007
    Publication date: August 16, 2007
    Inventors: Young Cho, Sung Kwon, Tae Roh, Dae Lee, Jong Kim
  • Patent number: 7257061
    Abstract: The present invention relates to a method of searching for a recordable position of a writable disk, the method comprising the steps of (a) reading data recording information of the writable disk, the data recording information indicating a position of a last track recorded and a recordable position for data to be recorded; (b) examining whether or not an area after the recordable position indicated by the read data recording information has recorded data; and (c) determining whether to change the recordable position to another position for new input data based on the examination result.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: August 14, 2007
    Assignee: LG Electronics Inc.
    Inventor: Jim-Tae Roh
  • Publication number: 20070132495
    Abstract: A high-reliability, multi-threshold complementary metal oxide semiconductor (CMOS) latch circuit having low sub-threshold leakage current is provided. More particularly, a latch circuit and flip-flop that can be applied in the deep sub-micron era and that are entirely configured of only CMOS using a combination of a high threshold device and a low threshold device and a low-threshold-voltage stack structure, without using a power gating technique such as multi-threshold CMOS (MTCMOS) and a back bias voltage control technique such as variable threshold CMOS (VTCMOS), are provided.
    Type: Application
    Filed: September 13, 2006
    Publication date: June 14, 2007
    Inventors: Yil Yang, Jong Kim, Tae Roh, Dae Lee
  • Publication number: 20070104060
    Abstract: An optimal recording method for optical recording media which is capable of recording information about optimum recording conditions on an optical recording medium in order to allow a subsequent recording of data at an optimum recording power, based on the recorded optimum recording condition information. In this method, test data is recorded to allow derivation of an optimum power value based on reproduction characteristics of the test data. An intrinsic recorder ID information of an optical recording/reproducing apparatus, used to record data on the optical recording medium, and information about the record speed of the apparatus are recorded, along with the derived optimum power value, onto the count area of the optical recording medium or respective lead-in areas of sessions. The apparatus reads out the recorded optimum recording condition information when data is subsequently recorded onto the optical recording medium.
    Type: Application
    Filed: December 22, 2006
    Publication date: May 10, 2007
    Inventor: Jin-Tae Roh
  • Publication number: 20070069254
    Abstract: Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region having an upper portion of a streamlined shape (?) obtained by patterning an upper portion of a bulk silicon substrate with an embossed pattern, and having a thicker and wider area than the channel region; a nitride layer formed at both side surfaces of the single crystalline active region to expose an upper portion of the single crystalline active region at a predetermined height; and a gate electrode formed to be overlaid with the exposed upper portion of the single crystalline active region of the channel region.
    Type: Application
    Filed: June 6, 2006
    Publication date: March 29, 2007
    Inventors: Young Cho, Tae Roh, Jong Kim
  • Patent number: 7170835
    Abstract: An optimal recording apparatus and method for optical recording media are disclosed which are capable of recording data on the optical recording medium under optimum conditions in an optical recording/reproducing apparatus. In accordance with the optimal recording apparatus and method, a reference power value recorded on an optical recording medium is first read out. Test data is then recorded onto a first field of a test data in the optical recording medium under a condition in which a recording power value is varied with reference to the read power value. The test data recorded on the first field is subsequently reproduced in order to determine an optimum recording power value from the reproduced characteristics. Based on the determined optimum recording power value, test data is recorded on a second field of the test area under a condition in which a format of recording signals is varied. The test data recorded on the second field is subsequently reproduced in order to determine an optimum write strategy.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: January 30, 2007
    Assignee: LG Electronics Inc.
    Inventors: Jin-Tae Roh, Bok-Hyun Jo
  • Patent number: 7154829
    Abstract: Disclosed is an optimal recording method for optical recording media which is capable of recording information about optimum recording conditions on an optical recording medium in order to allow a subsequent recording of data at an optimum recording power, based on the recorded optimum recording condition information. In this method, test data is recorded to allow derivation of an optimum power value based on reproduction characteristics of the test data. An intrinsic recorder ID information of an optical recording/reproducing apparatus, used to record data on the optical recording medium, and information about the record speed of the apparatus are recorded, along with the derived optimum power value, onto the count area of the optical recording medium or respective lead-in areas of sessions. The apparatus reads out the recorded optimum recording condition information when data is subsequently recorded onto the optical recording medium.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: December 26, 2006
    Assignee: LG Electronics Inc.
    Inventor: Jin-Tae Roh
  • Publication number: 20060126467
    Abstract: An optimal recording apparatus and method for optical recording media are disclosed which are capable of recording data on the optical recording medium under optimum conditions in an optical recording/reproducing apparatus. In accordance with the optimal recording apparatus and method, a reference power value recorded on an optical recording medium is first read out. Test data is then recorded onto a first field of a test data in the optical recording medium under a condition in which a recording power value is varied with reference to the read power value. The test data recorded on the first field is subsequently reproduced in order to determine an optimum recording power value from the reproduced characteristics. Based on the determined optimum recording power value, test data is recorded on a second field of the test area under a condition in which a format of recording signals is varied. The test data recorded on the second field is subsequently reproduced in order to determine an optimum write strategy.
    Type: Application
    Filed: February 15, 2006
    Publication date: June 15, 2006
    Inventors: Jin-Tae Roh, Bok-Hyun Jo
  • Publication number: 20060112258
    Abstract: Provided is a parallel data path architecture for high energy efficiency. In this architecture, a plurality of parallel process units and a plurality of function units of the process units are controlled by instructions and processed in parallel to improve performance. Also, since only necessary process units and function units are enabled, power dissipation is reduced to enhance energy efficiency. Further, by use of a simple instruction format, hardware can be programmed as the parallel data path architecture for high energy efficiency, which satisfies both excellent performance and low power dissipation, thus elevating hardware flexibility.
    Type: Application
    Filed: June 6, 2005
    Publication date: May 25, 2006
    Inventors: Yil Yang, Tae Roh, Dae Lee, Sang Lee, Jong Kim
  • Publication number: 20050263821
    Abstract: Provided is a multiple-gate metal oxide semiconductor (MOS) transistor and a method for manufacturing the same, in which a channel is implemented in a streamline shape, an expansion region is implemented in a gradually increased form, and source and drain regions is implemented in an elevated structure by using a difference of a thermal oxidation rate depending on a crystal orientation of silicon and a geographical shape of the single-crystal silicon pattern. As the channel is formed in a streamline shape, it is possible to prevent the degradation of reliability due to concentration of an electric field and current driving capability by the gate voltage is improved because the upper portion and both sides of the channel are surrounded by the gate electrodes. In addition, a current crowding effect is prevented due to the expansion region increased in size and source and drain series resistance is reduced by elevated source and drain structures, thereby increasing the current driving capability.
    Type: Application
    Filed: November 16, 2004
    Publication date: December 1, 2005
    Inventors: Young Cho, Sung Kwon, Tae Roh, Dae Lee, Jong Kim
  • Patent number: 6967912
    Abstract: The present invention relates to method and apparatus for recording new data in a writable disk such as a once-writable disk CD-R and a rewritable disk CD-RW after previous recording to the disk is interrupted abnormally. A method of determining a recordable position of a writable disk according to the present invention, reads data recording information of the writable disk, examines whether or not an area after a recordable position indicated by the read data recording information has recorded data, and changes the recordable position to another position for new input data if the area has recorded data. Therefore, new data is always written after any uncompleted data track without being written over previously recorded data even if the recording information of an uncompleted data track is wrong or unusable.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: November 22, 2005
    Assignee: LG Electronics Inc.
    Inventor: Jin-Tae Roh