Patents by Inventor Tae-Sik Eo

Tae-Sik Eo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130299227
    Abstract: The present invention relates to a laminated body for forming a printed circuit board comprising: a separation member in which first conductive layers and second conductive layers separable from each other are sequentially provided on each of upper and lower surfaces of a separating-insulation member; a laminating-insulation member sequentially laminated on each of the upper and lower surfaces of the separation member; and a conductive layer sequentially laminated on each of upper and lower surfaces of the insulation member, a printed circuit board comprising the laminated body, and a method of manufacturing the same. The present invention provides the new multi-layer printed circuit board to which various designs, such as a double-sided structure or an unbalanced structure, are applicable while overcoming an application limitation of a single-sided printed circuit board structure in the related art, thereby improving productivity and economic feasibility.
    Type: Application
    Filed: November 4, 2011
    Publication date: November 14, 2013
    Applicant: DOOSAN CORPORATION
    Inventors: Eun Yong Chung, Kyung Woon Cho, Tae Sik Eo, Woo Hyun Noh
  • Patent number: 7320173
    Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.
    Type: Grant
    Filed: February 3, 2004
    Date of Patent: January 22, 2008
    Assignee: LG Electronics Inc.
    Inventors: Sung-Gue Lee, Jung-Ho Hwang, Joon-Wook Han, Sang-Min Lee, Tae-Sik Eo, Yu-Seock Yang
  • Patent number: 7189302
    Abstract: A fabricating method for a multi-layer printed circuit board is provided. The method may include attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to each of the releasing films and a resist layer to each of the first metal films to form a base member. A first connection portion may then be formed on each of the first metal films, and a second connection portion may be integrally formed on each of the first connection portions. A second metal film may then be formed on each of the second connection portions so as to be electrically connected to the connection portions, and, in turn, to the first metal films. Specific portions of the second metal films may be etched to form copper patterns. Upper and lower portions may then be separated by the releasing films to form separate multi-layer printed circuit boards.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: March 13, 2007
    Assignee: LG Electronics Inc.
    Inventors: Jung-Ho Hwang, Sung-Gue Lee, Sang-Min Lee, Joon-Wook Han, Tae-Sik Eo, Yu-Seock Yang
  • Publication number: 20050098347
    Abstract: A fabricating method for a multi-layer printed circuit board comprises the steps of: attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to the releasing film, thereby forming a base member; forming a first connection portion on the first metal film by an electroplating process; forming a connection portion that a second connection portion is integrally formed with the first connection portion on the first connection portion; forming a second metal film on the second connection portion so as to be electrically connected to the connection portion; and etching a specific part of the second metal film and thereby forming copper patterns.
    Type: Application
    Filed: November 5, 2004
    Publication date: May 12, 2005
    Inventors: Jung-Ho Hwang, Sung-Gue Lee, Sang-Min Lee, Joon-Wook Han, Tae-Sik Eo, Yu-Seock Yang
  • Publication number: 20040154162
    Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.
    Type: Application
    Filed: February 3, 2004
    Publication date: August 12, 2004
    Applicant: LG Electronics Inc.
    Inventors: Sung-Gue Lee, Jung-Ho Hwang, Joon-Wook Han, Sang-Min Lee, Tae-Sik Eo, Yu-Seock Yang