Patents by Inventor Tae Sik Yoon
Tae Sik Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240141231Abstract: A semiconductor nanocrystal including an anion of an inorganic metal salt and a first organic ligand bound to a surface of the semiconductor nanocrystal, wherein the first organic ligand includes a substituted or unsubstituted C6 to C30 aromatic ring group and a carboxylate, a substituted or unsubstituted C3 to C30 aromatic hetero cyclic group and a carboxylate, or a combination thereof.Type: ApplicationFiled: December 11, 2023Publication date: May 2, 2024Inventors: Kwanghee KIM, Tae Hyung KIM, Hongkyu SEO, Won Sik YOON, Jaeyong LEE, Eun Joo JANG, Oul CHO
-
Publication number: 20240135863Abstract: A display device includes a display unit including pixels connected to data lines and scan lines, first and second temperature sensors for sensing first and second temperatures of the display unit, a data driver configured to generate a data signal configured to be supplied to the data lines using output data, and attached to a first printed circuit board configured to be fixed to a rear surface of the display unit, a timing controller configured to generate the output data using input data, and attached to a second printed circuit board configured to be fixed to the rear surface of the display unit, and a storage having a temperature weight table including a weight corresponding to the first and second temperatures and a plurality of temperature tables including temperature information of the display unit corresponding to an attachment position of the second printed circuit board.Type: ApplicationFiled: July 13, 2023Publication date: April 25, 2024Inventors: Won Jin SEO, Tae Wan KIM, Hwa An SUNG, Hyun Sik YOON, Jeong Ah LEE, Dae Ho HWANG
-
Patent number: 11963376Abstract: A light emitting device includes: a first electrode and a second electrode facing each other, an emissive layer disposed between the first electrode and the second electrode and including a quantum dot, an electron auxiliary layer disposed between the emissive layer and the second electrode and including a plurality of nanoparticles, and a polymer layer between a portion of the second electrode and the electron auxiliary layer, wherein the nanoparticles include a metal oxide including zinc, wherein the second electrode has a first surface facing a surface of the electron auxiliary layer and a second surface opposite to the first surface, and the polymer layer is disposed on a portion of the second surface and a portion of the surface of the electron auxiliary layer, and wherein the polymer layer includes a polymerization product of a thiol compound and an unsaturated compound having at least two carbon-carbon unsaturated bonds.Type: GrantFiled: September 14, 2022Date of Patent: April 16, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Tae Ho Kim, Won Sik Yoon, Jeong Hee Lee, Eun Joo Jang, Oul Cho
-
Patent number: 11925043Abstract: A quantum dot light-emitting device including first electrode and a second electrode, a quantum dot layer between the first electrode and the second electrode, a first electron transport layer and a second electron layer disposed between the quantum dot layer and the second electrode. The second electron transport layer is disposed between the quantum dot layer and the first electron transport layer, wherein each of the first electron transport layer and the second electron transport layer includes an inorganic material. A lowest unoccupied molecular orbital energy level of the second electron transport layer is shallower than a lowest unoccupied molecular orbital energy level of the first electron transport layer, and a lowest unoccupied molecular orbital energy level of the quantum dot layer is shallower than a lowest unoccupied molecular orbital energy level of the second electron transport layer. An electronic device including the quantum dot light-emitting device.Type: GrantFiled: October 16, 2020Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Moon Gyu Han, Heejae Lee, Eun Joo Jang, Tae Ho Kim, Kun Su Park, Won Sik Yoon, Hyo Sook Jang
-
Patent number: 11925044Abstract: A light emitting device includes: a first electrode and a second electrode facing each other, an emissive layer disposed between the first electrode and the second electrode and including a quantum dot, an electron auxiliary layer disposed between the emissive layer and the second electrode and including a plurality of nanoparticles, and a polymer layer between a portion of the second electrode and the electron auxiliary layer, wherein the nanoparticles include a metal oxide including zinc, wherein the second electrode has a first surface facing a surface of the electron auxiliary layer and a second surface opposite to the first surface, and the polymer layer is disposed on a portion of the second surface and a portion of the surface of the electron auxiliary layer, and wherein the polymer layer includes a polymerization product of a thiol compound and an unsaturated compound having at least two carbon-carbon unsaturated bonds.Type: GrantFiled: September 14, 2022Date of Patent: March 5, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Tae Ho Kim, Won Sik Yoon, Jeong Hee Lee, Eun Joo Jang, Oul Cho
-
Patent number: 11810983Abstract: Provided is a semiconductor device including a substrate, a tunneling insulating film disposed on the substrate, a control gate electrode disposed on the tunneling insulating film, a first floating gate electrode disposed between the control gate electrode and the tunneling insulating film, a second floating gate electrode disposed between the first floating gate electrode and the tunneling insulating film, a first control gate insulating film disposed between the first floating gate electrode and the control gate electrode, a second control gate insulating film disposed between the second floating gate electrode and the first floating gate electrode, and a source electrode and a drain electrode disposed on the substrate to be spaced apart from each other with respect to the control gate electrode, wherein the control gate electrode includes a first metal material, wherein the first floating gate electrode includes a second metal material, wherein the second floating gate electrode includes a third metal mateType: GrantFiled: August 4, 2021Date of Patent: November 7, 2023Assignee: UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventor: Tae Sik Yoon
-
Patent number: 11290279Abstract: The present disclosure relates to an authentication terminal, an authentication device, and an authentication method and system using the authentication terminal and the authentication device, and more particularly, to a device and a method for authenticating users and allowing transactions through information delivery among a user terminal, an authentication terminal, and an authentication device.Type: GrantFiled: August 22, 2018Date of Patent: March 29, 2022Inventor: Tae Sik Yoon
-
Publication number: 20220045217Abstract: Provided is a semiconductor device including a substrate, a tunneling insulating film disposed on the substrate, a control gate electrode disposed on the tunneling insulating film, a first floating gate electrode disposed between the control gate electrode and the tunneling insulating film, a second floating gate electrode disposed between the first floating gate electrode and the tunneling insulating film, a first control gate insulating film disposed between the first floating gate electrode and the control gate electrode, a second control gate insulating film disposed between the second floating gate electrode and the first floating gate electrode, and a source electrode and a drain electrode disposed on the substrate to be spaced apart from each other with respect to the control gate electrode, wherein the control gate electrode includes a first metal material, wherein the first floating gate electrode includes a second metal material, wherein the second floating gate electrode includes a third metal mateType: ApplicationFiled: August 4, 2021Publication date: February 10, 2022Applicant: ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGYInventor: Tae Sik YOON
-
Patent number: 11152926Abstract: A modulator includes: a high voltage transformer transforming a voltage supplied through a primary side and a secondary side to apply a current pulse to a driving device; a bipolar pulse generator applying a magnetizing pulse and a main pulse to a connection line connected to the primary side of the high voltage transformer; and a timing controller controlling a time difference of applying the magnetizing pulse and the main pulse, wherein the bipolar pulse generator includes a magnetizing pulse generation unit generating the magnetizing pulse by using positive power, and a main pulse generation unit generating a negative pulse by using negative power. Also, the modulator includes a pulse waveform controller in which a plurality of unit modules of the same structure is disposed in series through a small transformer on the secondary side of the high voltage transformer.Type: GrantFiled: August 19, 2019Date of Patent: October 19, 2021Assignee: KOREA ATOMIC ENERGY RESEARCH INSTITUTEInventors: Young Uk Jeong, Gudkov Boris, Ki Tae Lee, Sangyoon Bae, Tae Sik Yoon
-
Publication number: 20200382307Abstract: The present disclosure relates to an authentication terminal, an authentication device, and an authentication method and system using the authentication terminal and the authentication device, and more particularly, to a device and a method for authenticating users and allowing transactions through information delivery among a user terminal, an authentication terminal, and an authentication device.Type: ApplicationFiled: August 22, 2018Publication date: December 3, 2020Inventor: Tae Sik YOON
-
Publication number: 20200067494Abstract: A modulator includes: a high voltage transformer transforming a voltage supplied through a primary side and a secondary side to apply a current pulse to a driving device; a bipolar pulse generator applying a magnetizing pulse and a main pulse to a connection line connected to the primary side of the high voltage transformer; and a timing controller controlling a time difference of applying the magnetizing pulse and the main pulse, wherein the bipolar pulse generator includes a magnetizing pulse generation unit generating the magnetizing pulse by using positive power, and a main pulse generation unit generating a negative pulse by using negative power. Also, the modulator includes a pulse waveform controller in which a plurality of unit modules of the same structure is disposed in series through a small transformer on the secondary side of the high voltage transformer.Type: ApplicationFiled: August 19, 2019Publication date: February 27, 2020Inventors: Young Uk JEONG, Gudkov BORIS, Ki Tae LEE, Sangyoon BAE, Tae Sik YOON
-
Publication number: 20180025358Abstract: The present invention relates to a security management system for a mobile phone that maximizes personal information security by separating a main storage device (memory) of the mobile phone into separate independent systems.Type: ApplicationFiled: April 11, 2016Publication date: January 25, 2018Inventor: Tae Sik YOON
-
Patent number: 8834077Abstract: A method of fabricating a micro drill, which includes a drill part for machining a hole and a shank part fixed to a motor, the drill part and the shank part being made of different materials. The method includes the steps of forming a drill part-forming powder compact having a recess in one end thereof, and forming a shank part-forming powder compact having a protrusion, the protrusion intended to be fitted into the recess of the drill part-forming powder compact, forming an assembly of the drill part-forming powder compact and the shank part-forming powder compact, with the protrusion fitted into the recess, and simultaneously sintering the assembly of the drill part-forming powder compact and the shank part-forming powder compact.Type: GrantFiled: June 23, 2009Date of Patent: September 16, 2014Assignee: Bestner Inc.Inventors: Tae Sik Yoon, Soon Jin Cho, Seung Hyun Cho, Jae Joon Lee
-
Publication number: 20110182684Abstract: A method of fabricating a micro drill, which includes a drill part for machining a hole and a shank part fixed to a motor, the drill part and the shank part being made of different materials. The method includes the steps of forming a drill part-forming powder compact having a recess in one end thereof, and forming a shank part-forming powder compact having a protrusion, the protrusion intended to be fitted into the recess of the drill part-forming powder compact, forming an assembly of the drill part-forming powder compact and the shank part-forming powder compact, with the protrusion fitted into the recess, and simultaneously sintering the assembly of the drill part-forming powder compact and the shank part-forming powder compact.Type: ApplicationFiled: June 23, 2009Publication date: July 28, 2011Inventors: Tae Sik Yoon, Soon Jin Cho, Seung Hyun Cho, Jae Joon Lee
-
Patent number: 7517776Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.Type: GrantFiled: January 29, 2007Date of Patent: April 14, 2009Assignee: The Regents of the University of CaliforniaInventors: Ya-Hong Xie, Tae-Sik Yoon
-
Patent number: 7459731Abstract: An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions include threading dislocations while the remainder of the relaxed buffer layer is substantially free of threading dislocations. The relaxed buffer layer may be formed from silicon germanium while the substrate may be formed from silicon. A capping layer may be disposed over the relaxed buffer layer.Type: GrantFiled: August 30, 2006Date of Patent: December 2, 2008Assignee: The Regents of the University of CaliforniaInventors: Ya-Hong Xie, Tae-Sik Yoon
-
Publication number: 20070123008Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.Type: ApplicationFiled: January 29, 2007Publication date: May 31, 2007Applicant: The Regents of the University of CaliforniaInventors: Ya-Hong Xie, Tae-Sik Yoon
-
Publication number: 20070052009Abstract: A phase change random access memory (PRAM) element is provided that is driven by a MOSFET. The MOSFET includes, for example, a source region, a drain region, and a gate electrode disposed between the source region and the drain region. An insulator layer (e.g., oxide layer) separates the gate electrode from contact with the region of the substrate between the source and drain regions. A first electrode contact is coupled to the drain region of the MOSFET at one end and terminates at a surface. The surface of the first electrode contact is coated with a phase change material. A second electrode contact is provided having a surface coated with a layer of phase change material. The PRAM element includes at least one columnar member formed from a phase change material interposed between the phase change material layer of the first electrode and phase change material layer of the second electrode.Type: ApplicationFiled: September 5, 2006Publication date: March 8, 2007Applicant: The Regents of the University of CaliforniaInventors: Ya-Hong Xie, Tae-Sik Yoon, Zuoming Zhao
-
Patent number: 7186626Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes depositing a strained silicon germanium layer on the substrate and irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.Type: GrantFiled: July 22, 2005Date of Patent: March 6, 2007Assignee: The Regents of the University of CaliforniaInventors: Ya-Hong Xie, Tae-Sik Yoon
-
Publication number: 20070020874Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes depositing a strained silicon germanium layer on the substrate and irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.Type: ApplicationFiled: July 22, 2005Publication date: January 25, 2007Inventors: Ya-Hong Xie, Tae-Sik Yoon