Abstract: Provided is a semiconductor device including a substrate, a tunneling insulating film disposed on the substrate, a control gate electrode disposed on the tunneling insulating film, a first floating gate electrode disposed between the control gate electrode and the tunneling insulating film, a second floating gate electrode disposed between the first floating gate electrode and the tunneling insulating film, a first control gate insulating film disposed between the first floating gate electrode and the control gate electrode, a second control gate insulating film disposed between the second floating gate electrode and the first floating gate electrode, and a source electrode and a drain electrode disposed on the substrate to be spaced apart from each other with respect to the control gate electrode, wherein the control gate electrode includes a first metal material, wherein the first floating gate electrode includes a second metal material, wherein the second floating gate electrode includes a third metal mate

Abstract: The present disclosure relates to an authentication terminal, an authentication device, and an authentication method and system using the authentication terminal and the authentication device, and more particularly, to a device and a method for authenticating users and allowing transactions through information delivery among a user terminal, an authentication terminal, and an authentication device.

Abstract: Provided is a semiconductor device including a substrate, a tunneling insulating film disposed on the substrate, a control gate electrode disposed on the tunneling insulating film, a first floating gate electrode disposed between the control gate electrode and the tunneling insulating film, a second floating gate electrode disposed between the first floating gate electrode and the tunneling insulating film, a first control gate insulating film disposed between the first floating gate electrode and the control gate electrode, a second control gate insulating film disposed between the second floating gate electrode and the first floating gate electrode, and a source electrode and a drain electrode disposed on the substrate to be spaced apart from each other with respect to the control gate electrode, wherein the control gate electrode includes a first metal material, wherein the first floating gate electrode includes a second metal material, wherein the second floating gate electrode includes a third metal mate

Abstract: A modulator includes: a high voltage transformer transforming a voltage supplied through a primary side and a secondary side to apply a current pulse to a driving device; a bipolar pulse generator applying a magnetizing pulse and a main pulse to a connection line connected to the primary side of the high voltage transformer; and a timing controller controlling a time difference of applying the magnetizing pulse and the main pulse, wherein the bipolar pulse generator includes a magnetizing pulse generation unit generating the magnetizing pulse by using positive power, and a main pulse generation unit generating a negative pulse by using negative power. Also, the modulator includes a pulse waveform controller in which a plurality of unit modules of the same structure is disposed in series through a small transformer on the secondary side of the high voltage transformer.

Abstract: The present disclosure relates to an authentication terminal, an authentication device, and an authentication method and system using the authentication terminal and the authentication device, and more particularly, to a device and a method for authenticating users and allowing transactions through information delivery among a user terminal, an authentication terminal, and an authentication device.

Abstract: A modulator includes: a high voltage transformer transforming a voltage supplied through a primary side and a secondary side to apply a current pulse to a driving device; a bipolar pulse generator applying a magnetizing pulse and a main pulse to a connection line connected to the primary side of the high voltage transformer; and a timing controller controlling a time difference of applying the magnetizing pulse and the main pulse, wherein the bipolar pulse generator includes a magnetizing pulse generation unit generating the magnetizing pulse by using positive power, and a main pulse generation unit generating a negative pulse by using negative power. Also, the modulator includes a pulse waveform controller in which a plurality of unit modules of the same structure is disposed in series through a small transformer on the secondary side of the high voltage transformer.

Abstract: The present invention relates to a security management system for a mobile phone that maximizes personal information security by separating a main storage device (memory) of the mobile phone into separate independent systems.

Abstract: A method of fabricating a micro drill, which includes a drill part for machining a hole and a shank part fixed to a motor, the drill part and the shank part being made of different materials. The method includes the steps of forming a drill part-forming powder compact having a recess in one end thereof, and forming a shank part-forming powder compact having a protrusion, the protrusion intended to be fitted into the recess of the drill part-forming powder compact, forming an assembly of the drill part-forming powder compact and the shank part-forming powder compact, with the protrusion fitted into the recess, and simultaneously sintering the assembly of the drill part-forming powder compact and the shank part-forming powder compact.

Abstract: A method of fabricating a micro drill, which includes a drill part for machining a hole and a shank part fixed to a motor, the drill part and the shank part being made of different materials. The method includes the steps of forming a drill part-forming powder compact having a recess in one end thereof, and forming a shank part-forming powder compact having a protrusion, the protrusion intended to be fitted into the recess of the drill part-forming powder compact, forming an assembly of the drill part-forming powder compact and the shank part-forming powder compact, with the protrusion fitted into the recess, and simultaneously sintering the assembly of the drill part-forming powder compact and the shank part-forming powder compact.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions include threading dislocations while the remainder of the relaxed buffer layer is substantially free of threading dislocations. The relaxed buffer layer may be formed from silicon germanium while the substrate may be formed from silicon. A capping layer may be disposed over the relaxed buffer layer.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent and depositing a strained silicon germanium layer on the substrate. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: A phase change random access memory (PRAM) element is provided that is driven by a MOSFET. The MOSFET includes, for example, a source region, a drain region, and a gate electrode disposed between the source region and the drain region. An insulator layer (e.g., oxide layer) separates the gate electrode from contact with the region of the substrate between the source and drain regions. A first electrode contact is coupled to the drain region of the MOSFET at one end and terminates at a surface. The surface of the first electrode contact is coated with a phase change material. A second electrode contact is provided having a surface coated with a layer of phase change material. The PRAM element includes at least one columnar member formed from a phase change material interposed between the phase change material layer of the first electrode and phase change material layer of the second electrode.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes depositing a strained silicon germanium layer on the substrate and irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: An article of manufacture includes a substrate, a relaxed buffer layer disposed on the substrate, and a plurality of isolation regions formed in the relaxed buffer layer. The isolation regions include threading dislocations while the remainder of the relaxed buffer layer is substantially free of threading dislocations. The relaxed buffer layer may be formed from silicon germanium while the substrate may be formed from silicon. A capping layer may be disposed over the relaxed buffer layer.

Abstract: A method for controlling dislocation position in a silicon germanium buffer layer located on a substrate includes depositing a strained silicon germanium layer on the substrate and irradiating one or more regions of the silicon germanium layer with a dislocation inducing agent. The dislocation inducing agent may include ions, electrons, or other radiation source. Dislocations in the silicon germanium layer are located in one or more of the regions. The substrate and strained silicon germanium layer may then be subjected to an annealing process to transform the strained silicon germanium layer into a relaxed state. A top layer of strained silicon or silicon germanium may be deposited on the relaxed silicon germanium layer. Semiconductor-based devices may then be fabricated in the non-damaged regions of the strained silicon or silicon germanium layer. Threading dislocations are confined to damaged areas which may be transformed into SiO2 isolation regions.

Abstract: Memory of a multilevel quantum dot structure and a method for fabricating the same, is disclosed, the method including the steps of (1) forming a first insulating layer on a substrate, (2) repeating formation of a conductive layer and a second insulating layer on the first insulating layer at least once, and (3) agglomerating each of the conductive layers to form quantized dot layers.

Abstract: A method for forming quantum dots using agglomeration of a conductive layer and a semiconductor device resulting therefrom are disclosed. The method includes the steps of forming a first insulating layer on a substrate, forming a conductive layer on the first insulating layer, forming a second insulating layer on the conductive layer, and annealing the conductive layer between the first, and second insulating layers to agglomerate the conductive layer.

Abstract: Memory of a multilevel quantum dot structure and a method for fabricating the same, is disclosed, the method including the steps of (1) forming a first insulating layer on a substrate, (2) repeating formation of a conductive layer and a second insulating layer on the first insulating layer at least once, and (3) agglomerating each of the conductive layers to form quantized dot layers.

Abstract: A semiconductor memory having a multilevel quantum dot structure is formed by alternatively disposing conductive layers and insulation layers, and processing these layers so that quantum dots are formed in the conductive layers. The writing and reading of data into the semiconductor memory are achieved by using the principle of Coulomb blockade and quantized voltage drops. The size and distribution of the quantum dots are controlled by agglomeration, selective oxidation, etc. in order to achieve the desired quantum dot layer structure so that the immigration of charges between a semiconductor channel and each quantum dot layer is different.