Patents by Inventor Tae-Su Park

Tae-Su Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981851
    Abstract: A quantum dot including a core comprising a first semiconductor nanocrystal including a zinc chalcogenide and a semiconductor nanocrystal shell disposed on the surface of the core and comprising zinc, selenium, and sulfur. The quantum dot does not comprise cadmium, emits blue light, and may exhibit a digital diffraction pattern obtained by a Fast Fourier Transform of a transmission electron microscopic image including a (100) facet of a zinc blende structure. In an X-ray diffraction spectrum of the quantum dot, a ratio of a defect peak area with respect to a peak area of a zinc blende crystal structure is less than about 0.8:1. A method of producing the quantum dot, and an electroluminescent device including the quantum dot are also disclosed.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: May 14, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Kun Su Park, Yuho Won, Jeong Hee Lee, Eun Joo Jang, Hyo Sook Jang, Yong Seok Han, Heejae Chung
  • Publication number: 20240139850
    Abstract: An arc welding device for a secondary battery according to an embodiment of the present invention includes an upper fixing portion in which a plurality of welding electrode units connected to one pole of a welding power are disposed and a lower fixing portion disposed to face the upper fixing portion with an object to be welded therebetween and connected to the other pole of the welding power. The upper fixing portion includes a first facing surface facing the object to be welded and formed to be concave toward the object to be welded and the lower fixing portion includes a second facing surface facing the first facing face and formed to be convex to correspond to the concave shape of the first facing surface.
    Type: Application
    Filed: February 16, 2022
    Publication date: May 2, 2024
    Applicant: LG Energy Solution, Ltd.
    Inventors: Jung Hyun Park, Tae Su Kim, Beom Seok Lee, Hyuk Soo Lee
  • Publication number: 20240113268
    Abstract: A display device includes a first electrode, an outer electrode surrounding the first electrode, a bank overlapping the outer electrode in a plan view, the bank including an opening that exposes the first electrode, a light emitting element disposed on the first electrode and in the opening of the bank, and a second electrode disposed on the light emitting element. The outer electrode may be electrically disconnected from the first electrode upon a bad contact between a light emitting member and the outer electrode. As a result, defective pixels can be repaired.
    Type: Application
    Filed: May 30, 2023
    Publication date: April 4, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Seul Ki KIM, Tae Jin KONG, Myeong Hee KIM, Ji Eun PARK, Myeong Su SO
  • Patent number: 11945925
    Abstract: Provided are a polyimide-based film having excellent visibility, a film for a cover window, and a display device including the same.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: April 2, 2024
    Assignees: SK Innovation Co., Ltd., SK ie technology Co., Ltd.
    Inventors: Jin Su Park, Keon Hyeok Ko, Byoung Sun Ko, Jong Nam Ahn, Tae Sug Jang
  • Patent number: 11935984
    Abstract: A quantum dot including a core that includes a first semiconductor nanocrystal including zinc and selenium, and optionally sulfur and/or tellurium, and a shell that includes a second semiconductor nanocrystal including zinc, and at least one of sulfur or selenium is disclosed. The quantum dot has an average particle diameter of greater than or equal to about 13 nm, an emission peak wavelength in a range of about 440 nm to about 470 nm, and a full width at half maximum (FWHM) of an emission wavelength of less than about 25 nm. A method for preparing the quantum dot, a quantum dot-polymer composite including the quantum dot, and an electronic device including the quantum dot is also disclosed.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Seok Han, Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Kun Su Park, Yuho Won, Jeong Hee Lee, Eun Joo Jang, Hyo Sook Jang
  • Publication number: 20240080011
    Abstract: A bulk-acoustic wave (BAW) resonator includes a central portion in which a first electrode, a piezoelectric layer, and a second electrode are sequentially stacked on a substrate, and an extension portion extending externally from the central portion, and an insertion layer and a loss prevention film are disposed in the extension portion between the substrate and the second electrode. The loss prevention film is formed to have a thickness of 50 ? to 500 ?. The insertion layer is stacked on the loss prevention film, and has a side surface opposing the central portion, the side surface is formed as a first inclined surface having a first inclination angle. The loss prevention film has a side surface opposing the central portion, the side surface is formed as a second inclined surface having a second inclination angle. The second inclination angle is formed to be greater than the first inclination angle.
    Type: Application
    Filed: February 22, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Moon Chul LEE, Jae Hyoung GIL, Kwang Su KIM, Sung Jun LEE, Yong Suk KIM, Dong Hyun PARK, Tae Kyung LEE
  • Patent number: 11925043
    Abstract: A quantum dot light-emitting device including first electrode and a second electrode, a quantum dot layer between the first electrode and the second electrode, a first electron transport layer and a second electron layer disposed between the quantum dot layer and the second electrode. The second electron transport layer is disposed between the quantum dot layer and the first electron transport layer, wherein each of the first electron transport layer and the second electron transport layer includes an inorganic material. A lowest unoccupied molecular orbital energy level of the second electron transport layer is shallower than a lowest unoccupied molecular orbital energy level of the first electron transport layer, and a lowest unoccupied molecular orbital energy level of the quantum dot layer is shallower than a lowest unoccupied molecular orbital energy level of the second electron transport layer. An electronic device including the quantum dot light-emitting device.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: March 5, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon Gyu Han, Heejae Lee, Eun Joo Jang, Tae Ho Kim, Kun Su Park, Won Sik Yoon, Hyo Sook Jang
  • Publication number: 20240072218
    Abstract: The present disclosure provides a display device and a method for fabricating the same. According to one or more embodiments, a display device includes a substrate, pixel electrodes above the substrate, light-emitting elements above the pixel electrodes, extending in a thickness direction of the substrate, and having a polyhedral shape in the thickness direction, a width of a middle portion of the polyhedral shape being greater than a width of an upper portion of the polyhedral shape and greater than a width of a lower portion of the polyhedral shape, and a common electrode above the light-emitting elements.
    Type: Application
    Filed: May 2, 2023
    Publication date: February 29, 2024
    Inventors: Tae Jin KONG, Myeong Hee KIM, Seul Ki KIM, Ji Eun PARK, Myeong Su SO
  • Patent number: 7868458
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: January 11, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20100169256
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Application
    Filed: March 12, 2010
    Publication date: July 1, 2010
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Patent number: 7734555
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: June 8, 2010
    Assignee: INHA-Industry Partnership Institute
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Publication number: 20090146306
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 11, 2009
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Patent number: 7476617
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: January 13, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20070282772
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Application
    Filed: July 14, 2006
    Publication date: December 6, 2007
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Publication number: 20060157742
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: February 24, 2006
    Publication date: July 20, 2006
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Patent number: 7037827
    Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 2, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20040180543
    Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: December 30, 2003
    Publication date: September 16, 2004
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee