Patents by Inventor Tae-Su Park

Tae-Su Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12248947
    Abstract: A banking processing method according is performed by a processing logic including an application for banking processing implemented on a user terminal and a computer-readable storage medium. The method comprises the steps of: when the application for banking processing is run, searching a hardware security area of the user terminal and confirming the existence of a certificate for confirming an execution history of the application for banking processing; when the existence of the certificate is confirmed, searching the security area and confirming the existence of a token key for identifying whether login information of the user has been set; when the existence of the token key is not confirmed, setting the login information of the user by providing a membership page for setting the login information of the user; and opening an account according to a request of the user whose login information has been set.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: March 11, 2025
    Assignee: KAKAOBANK CORP.
    Inventors: Jung Hee Ko, Tae Ki Ha, Yeun Su Koo, Bo Hyun Oh, Lee Rang Park, Sung Jun Kim, Ji Hong Park, Dong Joon Lee, Jung Min Ahn, Geun Won Mo, Hyeong Jin Jang, Jun Hyuk Yun, Hack Cheon Kim, Eun Jung Gil, Ji Eun Kim, Tae Won Kim, Seung Jin Lee, Do Young Lee
  • Publication number: 20250074263
    Abstract: An upper rail device for a seat of a vehicle includes: a lower plate in which a slot is formed, a drive housing mounted on the lower plate, a drive support that passes through the slot for insertion into a curved movement path of a lower rail, a motor with a reducer mounted on an upper surface of the drive housing, a drive shaft connected to an output portion of the reducer, a drive gear mounted on a lower end portion of the drive shaft and engaged with a driven gear mounted within the curved movement path of the lower rail. The upper rail device may be fastened to enable sliding movement along the curved movement path of the lower rail so that the seat can be moved in a diagonal or oblique direction depending on various purposes, which can improve a seat position movement adjustment.
    Type: Application
    Filed: March 27, 2024
    Publication date: March 6, 2025
    Inventors: Tae Jun Kwon, Hyun Ko, Hyun Kyu Moon, Tae Su Kim, Min Seok Kim, Yeon Jin Jeon, Sang Do Park, Sung Hyun Hwang, Sun Ho Hur, Tae Hyung Kim, Hwan Seok Kim
  • Patent number: 12240967
    Abstract: The present invention relates to a polypropylene-based composite, including (A) polypropylene, and (B) an olefin-based polymer satisfying the following conditions: (1) a melt index (MI, 190° C., 2.16 kg load conditions) is from 0.1 g/10 min to 10.0 g/10 min, (2) a density (d) is from 0.860 g/cc to 0.880 g/cc, and (3) T(90)-T(50)?50 and T(95)-T(90)?10 are satisfied, wherein T(50), T(90) and T(95) are temperatures at which 50%, 90%, and 95% are melted, respectively, when fractionating a temperature-heat capacity curve from measurement results by the differential scanning calorimetry precise measurement method (SSA). The polypropylene-based composite of the present invention may show excellent impact strength.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: March 4, 2025
    Assignee: LG Chem, Ltd.
    Inventors: Sang Eun Park, Eun Jung Lee, In Sung Park, Tae Su Kim, Choong Hoon Lee, Jin Sam Gong, Jung Ho Jun, Rae Keun Gwak
  • Patent number: 12230213
    Abstract: A gate driver includes a first scan signal generator configured to output a logic voltage for driving of a scan transistor through a plurality of stages connected in cascade, the scan transistor performing a switching operation to transfer a data voltage to a driving transistor of a pixel, a second scan signal generator configured to output a logic voltage for driving of a sensing transistor through the plurality of stages, the sensing transistor sensing deterioration of a light emitting element of the pixel, a light emission control signal generator configured to output a logic voltage for control of a light emission control transistor of the pixel through the plurality of stages, and an initialization voltage generator driven by logic voltages received from some nodes of the first scan signal generator based on the light emission control signal generator to supply an initialization voltage to the pixel.
    Type: Grant
    Filed: September 20, 2023
    Date of Patent: February 18, 2025
    Assignee: LG Display Co., Ltd.
    Inventors: Se-Hwan Kim, Tae-Keun Lee, Min-Su Kim, Hae-Jun Park, Young-Taek Hong
  • Patent number: 12221561
    Abstract: A hot-melt adhesive composition includes a styrene-butadiene-styrene triblock copolymer and a styrene-isoprene-styrene triblock copolymer. The hot-melt adhesive composition enables melt processing at a relatively low temperature because of having a low viscosity properties are property and thus exhibits excellent adhesive strength and heat resistance while improving the processability. In particular, the melt adhesive composition has excellent mechanical properties after curing, and thus can be used in various industrial fields.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: February 11, 2025
    Assignee: LG Chem, Ltd.
    Inventors: Yong Su Park, Tae Yun Kim, Seungwhan Oh, Jin Young Ryu
  • Patent number: 12225746
    Abstract: A light emitting device and a production method thereof. The light emitting device includes a light emitting layer including a plurality of quantum dots, and an electron auxiliary layer disposed on the light emitting layer, the electron auxiliary layer configured to transport electrons, inject electrons into the light emitting layer, or a combination thereof, wherein the electron auxiliary layer includes a plurality of metal oxide nanoparticles and a nitrogen-containing metal complex. The metal oxide nanoparticles include zinc and optionally a dopant metal, the dopant metal includes Mg, Co, Ga, Ca, Zr, W, Li, Ti, Y, Al, Co, or a combination thereof and a mole ratio of nitrogen to zinc in the electron auxiliary layer is greater than or equal to about 0.001:1.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: February 11, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyo Sook Jang, Eun Joo Jang, Ilyoung Lee, Tae Ho Kim, Kun Su Park, Jun-Mo Yoo
  • Publication number: 20250033535
    Abstract: A lower rail for a seat of a vehicle has a structure with a curved movement path, in which the seat may be moved in an oblique direction or a diagonal direction according to various seat positions, thereby allowing a degree of freedom for adjusting a seat position movement. In addition, the lower rail includes a curved inner channel bent at a predetermined angle and a curved outer channel bent at about a same angle as the curved inner channel, which are separately provided and configured to be mutually combined in order to provide one curved movement path for moving the seat.
    Type: Application
    Filed: March 26, 2024
    Publication date: January 30, 2025
    Inventors: Tae Jun Kwon, Hyun Ko, Hyun Kyu Moon, Tae Su Kim, Yeon Jin Jeon, Sang Do Park, Min Seok Kim, Sun Ho Hur, Tae Hyung Kim, Hyun Deok Choi
  • Patent number: 12208708
    Abstract: A seat rail retainer includes a body, among a first rail and a second rail that are disposed to slide straightly respectively in a longitudinal direction, the body being fixed to the first rail, an elastic supporting portion protruding from the body to be elastically pressed by the second rail, and an inserting body inserted into the body to provide an elastic force to the elastic supporting portion.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: January 28, 2025
    Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, DAE WON SAN UP CO., LTD
    Inventors: Tae Jun Kwon, Hyun Ko, Hyun Kyu Moon, Min Seok Kim, Sang Do Park, Tae Su Kim, Sang Hyun Lee, Yong Chul Jang
  • Patent number: 12204365
    Abstract: A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: January 21, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jun Dal Kim, Dong Won Park, Hyun Su Kim, Kyung Youl Min, Jong Man Bae, Jun Yong Song, Tae Young Jin
  • Patent number: 12206514
    Abstract: A transmitter includes a transmission controller which outputs original data through an original data lane, an encoder which encodes the original data into encoded data and outputs the encoded data through an encoded data lane, and a transmission driver which outputs the encoded data at a speed of M (M is a real number greater than 0) gigabits per second through a transmission and reception interface. The transmission driver provides a first clock signal corresponding to an output speed to the encoder, the encoder provides a second clock signal having a second frequency less than a first frequency of the first clock signal to the transmission controller, the transmission controller outputs the original data based on the second clock signal, and the encoder outputs the encoded data based on the first clock signal.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: January 21, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Tae Young Jin, Jun Dal Kim, Hyun Su Kim, Kyung Youl Min, Dong Won Park, Jong Man Bae
  • Patent number: 7868458
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: January 11, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20100169256
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Application
    Filed: March 12, 2010
    Publication date: July 1, 2010
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Patent number: 7734555
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Grant
    Filed: July 14, 2006
    Date of Patent: June 8, 2010
    Assignee: INHA-Industry Partnership Institute
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Publication number: 20090146306
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 11, 2009
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Patent number: 7476617
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: January 13, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20070282772
    Abstract: Disclosed herein is a separate learning system and method using a two-layered neural network having target values for hidden nodes. The separate learning system of the present invention includes an input layer for receiving training data from a user, and including at least one input node. A hidden layer includes at least one hidden node. A first connection weight unit connects the input layer to the hidden layer, and changes a weight between the input node and the hidden node. An output layer outputs training data that has been completely learned. The second connection weight unit connects the hidden layer to the output layer, changing a weight between the output and the hidden node, and calculates a target value for the hidden node, based on a current error for the output node.
    Type: Application
    Filed: July 14, 2006
    Publication date: December 6, 2007
    Applicant: INHA-INDUSTRY PARTNERSHIP INSTITUTE
    Inventors: Ju Hong Lee, Bum Ghi Choi, Tae Su Park
  • Publication number: 20060157742
    Abstract: The present invention relates to a semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. This titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer; an epitaxially grown titanium silicide layer having a phase of C49 and formed on the exposed silicon substrate disposed within the contact hole; and a metal layer formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: February 24, 2006
    Publication date: July 20, 2006
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Patent number: 7037827
    Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: May 2, 2006
    Assignee: Hynix Semiconductor Inc.
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee
  • Publication number: 20040180543
    Abstract: A semiconductor device with an epitaxially grown titanium silicide layer having a phase of C49 and a method for fabricating the same. The titanium silicide layer has a predetermined interfacial energy that does not transform the phase of the titanium layer, and thus, occurrences of agglomeration of the titanium layer and a grooving phenomenon can be prevented. The semiconductor device includes: a silicon layer; an insulation layer formed on the silicon layer, wherein a partial portion of the insulation layer is opened to form a contact hole exposing a partial portion of the silicon layer. An epitaxially grown titanium silicide layer having a phase of C49 and is formed on the exposed silicon substrate disposed within the contact hole; and a metal layer is formed on an upper surface of the titanium silicide layer.
    Type: Application
    Filed: December 30, 2003
    Publication date: September 16, 2004
    Inventors: Moon-Keun Lee, Tae-Kwon Lee, Jun-Mo Yang, Tae-Su Park, Yoon-Jik Lee