Abstract: Disclosed are a filter fastening unit assembly and a filter fastening unit. The filter fastening unit assembly includes a filter, and a filter fastening unit, to which the filter is coupled, the filter fastening unit includes a base having a base opening opened toward a first direction that is one direction that is perpendicular to an upward/downward direction, a housing disposed in the base opening, connected to the base to be movable upwards and downwards, and having a housing opening opened toward the first direction, a filter coupling part coupled to an upper side of the base, and including an introduction passage, though which water is introduced, and a discharge passage, through which the water is discharged, and a lever connected to the base to be rotatable, and connected to the housing to be rotatable.

Abstract: A PUF apparatus comprises: a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair in the PUF cell selected by a selected word line among the plurality of word lines.

Abstract: A nonvolatile memory device according to the embodiment includes: a first inverter; and a second inverter cross-coupled to the first inverter, wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner.

Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent to the package body, which is electrically connected to the conductive spaced-apart pillar structures.

Abstract: An example image forming apparatus includes a frame, a first shaft supported by the frame, and a first coupler. The first coupler includes a body coupled to one end of the first shaft and a first protrusion protruding from the body in an axial direction of the first shaft, the first protrusion having a first surface and a second protrusion protruding from the first surface. The second protrusion is to lock with a groove to mount a cartridge on the frame, the first shaft is to provide a rotational force in a first rotational direction to rotate the second protrusion of the first coupler and to insert the second protrusion into the groove to lock with the cartridge, and the first surface of the first protrusion of the first coupler is to contact a second surface to transmit the rotational force to the second coupler in the first rotational direction.

Abstract: Disclosed are a circuit and a system which is capable of improving reliability by preventing destructive overvoltage that occurs in an element using a low power supply voltage when various signals are transmitted from an integrated circuit with a high power supply voltage to an integrated circuit with a low power supply voltage.

Abstract: The present invention relates to a method of manufacturing polycrystalline silicon ingot using a crucible in which an oxygen exhaust passage is formed by single crystal or polycrystalline rods, the method including the steps of: manufacturing the single crystal or polycrystalline silicon rods each having the shape of a quadrilateral pillar; putting the single crystal or polycrystalline quadrilateral pillar-shaped silicon rods into the crucible in such a manner as to be arranged close to one another along the inner peripheral surface of the crucible to thus form a space portion inside the single crystal or polycrystalline silicon rods, into which silicon chunks are put, and the oxygen exhaust passages between the inner peripheral surface of the crucible and the respective surfaces of the single crystal or polycrystalline silicon rods oriented toward the inner peripheral surface of the crucible; putting the silicon chunks into the space portion of the crucible; and melting and crystallizing the silicon chunks.

Abstract: A Merkle tree-based data management method may comprise: aligning data into two-dimensional square matrix; calculating a hash value of each node of the two-dimensional square matrix; calculating hash values of each row of the two-dimensional square matrix; generating an additional column with nodes having the hash values of each row; calculating hash values of each column of the two-dimensional square matrix; generating an additional row with nodes having hash values of each column; and calculating a Merkle root by concatenating the hash values of the additional column and the hash values of the additional row.

Abstract: Disclosed are a circuit and a system which prevent unnecessary power consumption by cutting off static current occurring when a signal is transmitted from an integrated circuit with a low power supply voltage to an integrated circuit with a high power supply voltage.

Abstract: A ferroelectric random access memory device comprises: a memory cell array including a plurality of memory cells each having one ferroelectric transistor (FeFET) connected between a read line of a plurality of read lines and a source line of a plurality of source lines and one transistor connected between a bit line of a plurality of bit lines and a gate of the FeFET and having a gate connected to a corresponding word line of a plurality of word lines; and a read/write control unit, when address information for a memory cell to be written is applied with a write command and data, selecting a word line and a read line corresponding to a row address and applying a write voltage having a positive voltage level, and applying a ground voltage to the selected read line, and applying the write voltage to a bit line corresponding to a memory cell.

Abstract: Provided are a system and method for work quality assurance in vehicle manufacturing, which are capable of preventing defects in manufacturing, wherein the system for work quality assurance in vehicle manufacturing which assembles fastening objects to a vehicle transferred through a conveyor line through a working unit, includes a server configured to set a working area of the vehicle, assign work corresponding to the working area, check a position of the working unit in real time to calculate a stay period during which the working unit stays in the working area, receive work information from the working unit, and determine whether the work is successful on the basis of the stay period, the assigned work, and the work information.

Abstract: The present invention relates to a pharmaceutical composition comprising a maple leaf extract or fraction thereof for preventing or treating a retinal disease, a method for preventing or treating a retinal disease using the pharmaceutical composition, and a food composition comprising a maple leaf extract or fraction thereof for ameliorating the symptoms of a retinal disease. The pharmaceutical composition according to the present invention, which is effective for the treatment of a retinal disease, can be used pharmaceutically as a composition for preventing or treating a retinal disease, and can also be used advantageously as a health functional food.

Abstract: A PUF apparatus comprises: a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair in the PUF cell selected by a selected word line among the plurality of word lines.

Abstract: Exemplary embodiments provide a sensing amplifier based flip-flop applying a nonvolatile memory device which is applicable to a mobile device which has a small hardware area, uses a small control signal, does not include a separate write circuit, has low writing power consumption, a short reading time and small power consumption, and requires a low power operation.

Abstract: A nonvolatile memory device according to the embodiment includes: a first inverter; and a second inverter cross-coupled to the first inverter, wherein the second inverter includes a pull-up transistor, a pull-down transistor, and a ferroelectric field effect transistor having gate nodes connected to each other, and a restore transistor having one electrode connected to the ferroelectric field effect transistor, and the second inverter stores data in a nonvolatile manner.

Abstract: A ferroelectric random access memory device comprises: a memory cell array including a plurality of memory cells each having one ferroelectric transistor (FeFET) connected between a read line of a plurality of read lines and a source line of a plurality of source lines and one transistor connected between a bit line of a plurality of bit lines and a gate of the FeFET and having a gate connected to a corresponding word line of a plurality of word lines; and a read/write control unit, when address information for a memory cell to be written is applied with a write command and data, selecting a word line and a read line corresponding to a row address and applying a write voltage having a positive voltage level, and applying a ground voltage to the selected read line, and applying the write voltage to a bit line corresponding to a memory cell.

Abstract: The present invention relates to a pharmaceutical composition comprising a maple leaf extract or fraction thereof for preventing or treating a retinal disease, a method for preventing or treating a retinal disease using the pharmaceutical composition, and a food composition comprising a maple leaf extract or fraction thereof for ameliorating the symptoms of a retinal disease. The pharmaceutical composition according to the present invention, which is effective for the treatment of a retinal disease, can be used pharmaceutically as a composition for preventing or treating a retinal disease, and can also be used advantageously as a health functional food.

Abstract: Disclosed is an SRAM cell capable of performing a differential operation. An SRAM cell according to an embodiment of the present disclosure may include a data node portion including four transistors constituting first and second data nodes; a data controller including first and second pass-gate transistors configured to control read and write of data in the first and second data nodes; and a control transistor connected to the data node portion through the second data node and configured to be controlled based on a driving voltage of a second word line having an opposite polarity to a first word line transmitting a driving voltage to the data controller.

Abstract: Adaptive pulse generation circuits for clocking pulse latches with minimum hold time are provided. In one aspect, an adaptive pulse generation circuit employs a dynamic XOR-based logic gate configured to provide a pulse generation signal based on an XOR-based function of data input and data output-based signals of a pulse latch. A pull-down keeper circuit is configured to pull the pulse generation signal to a ground voltage in response to the pulse generation signal being in an inactive state while the clock signal is in an active state. A logic circuit is configured to generate an adaptive pulse signal to clock a pulse latch in response to the pulse generation signal and the clock signal being in an active state. This configuration results in the pulse width of the adaptive pulse signal corresponding to the input-to-output delay of the pulse latch.

Abstract: Disclosed is an SRAM cell capable of performing a differential operation. An SRAM cell according to an embodiment of the present disclosure may include a data node portion including four transistors constituting first and second data nodes; a data controller including first and second pass-gate transistors configured to control read and write of data in the first and second data nodes; and a control transistor connected to the data node portion through the second data node and configured to be controlled based on a driving voltage of a second word line having an opposite polarity to a first word line transmitting a driving voltage to the data controller.