Abstract: An integrated circuit package for scan testing a semiconductor chip includes at least one first input pad configured to receive a first input signal, at least one chip connected to the first input pad, and at least one first output pad configured to receive a first output signal generated by the at least one chip, wherein each of the at least one chip includes at least one second input pad configured to receive a second input signal, a plurality of scan chains, a first test circuit and a second test circuit, which share the plurality of scan chains, and at least one second output pad configured to receive a second output signal from the first test circuit.

Abstract: Provided is a method for estimating a disparity search range to which multi-level disparity image partition is applied, and a stereo image matching device using the same in that a disparity histogram of a previous disparity image is analyzed at the time of stereo matching of a continuous image, the disparity image is divided into various sizes of image blocks, and a disparity search range is estimated on the basis of a disparity value having the number of pixels equal to or more than a predetermined threshold value for each image block, thereby decreasing a calculation amount while improving a stereo matching rate of the next frame.

Abstract: Providedis a method for estimating a disparity search range to which multi-level disparity image partition is applied, and a stereo image matching device using the same in that a disparity histogram of a previous disparity image is analyzed at the time of stereo matching of a continuous image, the disparity image is divided into various sizes of image blocks, and a disparity search range is estimated on the basis of a disparity value having the number of pixels equal to or more than a predetermined threshold value for each image block, thereby decreasing a calculation amount while improving a stereo matching rate of the next frame.