Patents by Inventor Tae-Woong Jeong
Tae-Woong Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240152456Abstract: Embodiments of the present disclosure relate to a system and an operating method of the system. Based on some embodiments of the disclosed technology, the system may include a random access memory structured to include memory cells to store data, a cache memory configured to cache at least part of the data, and a processor in communication with the random access memory and the cache memory to access at least part of the data from the random access memory or cache memory. The system may determine a cache hit ratio for the cache memory, and may set an operating frequency of the random access memory based on the cache hit ratio.Type: ApplicationFiled: January 19, 2024Publication date: May 9, 2024Inventors: Yong Wan HWANG, Nam Hyeok JEONG, Kwang Ho CHOI, Moon Hyeok CHOI, Tae Woong HA
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Publication number: 20240107002Abstract: A method for coding image information includes generating prediction information by predicting information on a current coding unit, and determining whether the information on the current coding unit is the same as the prediction information. When the information on the current coding unit is the same as the prediction information, a flag indicating that the information on the current coding unit is the same as the prediction information is coded and transmitted. When the information on the current coding unit is not the same as the prediction information, a flag indicating that the information on the current coding unit is not the same as the prediction information and the information on the current coding unit are coded and transmitted.Type: ApplicationFiled: December 6, 2023Publication date: March 28, 2024Applicants: Electronics and Telecommunications Research Institute, University-Industry Cooperation Group of Kyung Hee UniversityInventors: Se Yoon JEONG, Hui Yong KIM, Sung Chang LIM, Jin Ho LEE, Ha Hyun LEE, Jong Ho KIM, Jin Soo CHOI, Jin Woong KIM, Chie Teuk AHN, Gwang Hoon PARK, Kyung Yong KIM, Tae Ryong KIM, Han Soo LEE
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Publication number: 20240094326Abstract: Disclosed herein are a method for access control using real-time positioning technology and a device using the same. According to a positioning method of a positioning module, the positioning module is configured to measure a location of at least one location-unrecognized device and a location of a terminal, wherein the at least one location-unrecognized device, the terminal and at least one location-recognized device is located in a certain zone, and wherein the positioning module has coordinate information of the at least one location-recognized device and the positioning module has not coordinate information of the at least one location-unrecognized device.Type: ApplicationFiled: August 21, 2023Publication date: March 21, 2024Applicant: SUPREMA INC.Inventors: Si Woong YOON, Tae Sung LEE, Jae Hyeok JEONG, Tae Hoon LEE
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Publication number: 20220215727Abstract: An image-based real-time intrusion detection method and a surveillance camera that use artificial intelligence are provided to sample a plurality of frames input at a first point in time, acquire a probability that at least one object corresponding to a type of a target object exists in an image of the respective sampled frames by using a first artificial neural network, adjust a sampling rate for a plurality of frames to be input at a second point in time after the first point in time according to processing time of each frame of the first artificial neural network required to acquire an existence probability of the at least one object, select each of the respective sampled frames as a frame of the target object according to a magnitude of the acquired probability, generate a movement trajectory of each object corresponding to the type of the target object from the frames selected as the frame of the target object, and acquire an intrusion occurrence probability from the generated movement trajectory by usinType: ApplicationFiled: April 23, 2020Publication date: July 7, 2022Inventor: Tae Woong JEONG
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Patent number: 10931925Abstract: The present invention relates to a monitoring camera having an autofocusing function based on a composite filtering robust against a change in visibility status and a video monitoring system employing the same. The present invention comprises: a hardware filter for blocking one of a visible light band and an infrared light band and allowing the other thereof to pass therethrough; and a software filter for filtering a color image or a black-and-white image generated by an image signal processor (ISP) by removing, from the color image or the black-and-white image, a factor reducing a visibility distance at the front side of a lens part, wherein the filtering band of the hardware filter and whether to perform filtering by the software filter are controlled according to a filtering level corresponding to a current visibility status at the front side of the lens part among a plurality of filtering levels.Type: GrantFiled: May 8, 2017Date of Patent: February 23, 2021Assignee: ESCA(ELECTRONIC SECURITY OF THE CREATIVE ASSOCIATION) CO., LTD.Inventors: Tae-woong Jeong, Jeong-il Kim
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Patent number: 10819941Abstract: The present invention relates to a monitoring camera using a composite filtering method robust against a change in visibility status and a video monitoring system employing the same. The present invention comprises: a hardware filter for blocking one of a visible light band and an infrared light band and allowing the other thereof to pass therethrough; and a software filter for filtering a color image or a black-and-white image generated by an image signal processor (ISP) by removing, from the color image or the black-and-white image, a factor reducing a visibility distance at the front side of a lens part, wherein the filtering band of the hardware filter and whether to perform filtering by the software filter are controlled according to a filtering level corresponding to a current visibility status at the front side of the lens part among a plurality of filtering levels.Type: GrantFiled: May 8, 2017Date of Patent: October 27, 2020Assignee: ESCA (ELECTRONIC SECURITY OF THE CREATIVE ASSOCATION) CO., LTD.Inventors: Tae-woong Jeong, Jeong-il Kim
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Publication number: 20200228762Abstract: The present invention relates to a monitoring camera having an autofocusing function based on a composite filtering robust against a change in visibility status and a video monitoring system employing the same. The present invention comprises: a hardware filter for blocking one of a visible light band and an infrared light band and allowing the other thereof to pass therethrough; and a software filter for filtering a color image or a black-and-white image generated by an image signal processor (ISP) by removing, from the color image or the black-and-white image, a factor reducing a visibility distance at the front side of a lens part, wherein the filtering band of the hardware filter and whether to perform filtering by the software filter are controlled according to a filtering level corresponding to a current visibility status at the front side of the lens part among a plurality of filtering levels.Type: ApplicationFiled: May 8, 2017Publication date: July 16, 2020Inventors: Tae-woong JEONG, Jeong-il KIM
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Publication number: 20190215479Abstract: The present invention relates to a monitoring camera using a composite filtering method robust against a change in visibility status and a video monitoring system employing the same. The present invention comprises: a hardware filter for blocking one of a visible light band and an infrared light band and allowing the other thereof to pass therethrough; and a software filter for filtering a color image or a black-and-white image generated by an image signal processor (ISP) by removing, from the color image or the black-and-white image, a factor reducing a visibility distance at the front side of a lens part, wherein the filtering band of the hardware filter and whether to perform filtering by the software filter are controlled according to a filtering level corresponding to a current visibility status at the front side of the lens part among a plurality of filtering levels.Type: ApplicationFiled: May 8, 2017Publication date: July 11, 2019Applicant: ESCA(ELECTRONIC SECURITY OF THE CREATIVE ASSOCIATION) CO., LTD.Inventors: Tae-woong JEONG, Jeong-il KIM
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Patent number: 7985670Abstract: A method of realizing a flash floating poly gate using an MPS process can include forming a tunnel oxide layer on an active region of a semiconductor substrate; and then forming a first floating gate on and contacting the tunnel oxide layer; and then forming second and third floating gates on and contacting the first floating gate, wherein the second and third floating gates extend perpendicular to the first floating gate; and then forming a poly meta-stable polysilicon layer on the first, second and third floating gates; and then forming a control gate on the semiconductor substrate including the poly meta-stable polysilicon layer. Therefore, it is possible to increase the surface area of the capacitor by a limited area in comparison with a flat floating gate. As a result, it is possible to improve the coupling ratio essential to the flash memory device and to improve the yield and reliability of the semiconductor device.Type: GrantFiled: May 16, 2008Date of Patent: July 26, 2011Assignee: Dongbu HiTek Co., Ltd.Inventor: Tae-Woong Jeong
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Publication number: 20100163953Abstract: Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a first polysilicon pattern formed on a semiconductor substrate, a second polysilicon pattern formed at a lateral side of the first polysilicon pattern such that the second polysilicon pattern extends to a height higher than the first polysilicon pattern, a third polysilicon pattern formed in a region restricted by a top surface of the first polysilicon pattern and a lateral side of the second polysilicon pattern, and a contact electrically connected with the second polysilicon pattern and the third polysilicon pattern.Type: ApplicationFiled: December 15, 2009Publication date: July 1, 2010Inventor: Tae Woong Jeong
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Publication number: 20100163999Abstract: A semiconductor element according to embodiments may include: a semiconductor substrate, a first oxide layer pattern formed over the semiconductor substrate, and a first polysilicon pattern formed over the first oxide layer pattern, wherein the substrate, the first oxide layer pattern and the first polysilicon pattern define a recess formed at both sides of the first oxide layer pattern and the first polysilicon pattern. A second polysilicon pattern may be formed over the first oxide layer pattern and the side wall of the first polysilicon pattern in the recess. A second oxide layer pattern, a second nitride layer pattern, and a third oxide layer pattern may be interposed between the first polysilicon pattern and the second polysilicon pattern, and between the second polysilicon pattern and the recess. Embodiments can be operated with lower electrical power in programming and erasing operations by forming a tip portion near a memory gate to increase an electric field at that portion.Type: ApplicationFiled: December 15, 2009Publication date: July 1, 2010Inventor: Tae-Woong Jeong
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Patent number: 7670906Abstract: Embodiments relate to a flash memory device and to method of fabricating a flash memory device is disclosed. According to embodiments, a method may include forming a device isolation layer on a semiconductor substrate to define active regions, forming floating gate patterns on the active regions, forming the photoresist patterns on the device isolation layer such that the photoresist patterns have side walls higher than the floating gate patterns, forming spacer patterns at the side walls of the photoresist patterns such that the spacer patterns partially cover the floating gate patterns, and etching the floating gate patterns by a predetermined depth using the spacer patterns as an etching mask.Type: GrantFiled: December 21, 2007Date of Patent: March 2, 2010Assignee: Dongbu HiTek Co., Ltd.Inventor: Tae-Woong Jeong
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Publication number: 20080290395Abstract: A method of realizing a flash floating poly gate using an MPS process can include forming a tunnel oxide layer on an active region of a semiconductor substrate; and then forming a first floating gate on and contacting the tunnel oxide layer; and then forming second and third floating gates on and contacting the first floating gate, wherein the second and third floating gates extend perpendicular to the first floating gate; and then forming a poly meta-stable polysilicon layer on the first, second and third floating gates; and then forming a control gate on the semiconductor substrate including the poly meta-stable polysilicon layer. Therefore, it is possible to increase the surface area of the capacitor by a limited area in comparison with a flat floating gate. As a result, it is possible to improve the coupling ratio essential to the flash memory device and to improve the yield and reliability of the semiconductor device.Type: ApplicationFiled: May 16, 2008Publication date: November 27, 2008Inventor: Tae-Woong Jeong
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Publication number: 20080290447Abstract: A method of making a semiconductor-oxide-nitride-oxide-semiconductor (SONOS) device by a process of growing Meta-stable poly silicon (MPS) regions is provided. Meta-stable poly silicon (MPS) regions are formed in the active region of a semiconductor substrate, dielectric materials are formed on the MPS regions, and control gates are formed on parts of the dielectric materials.Type: ApplicationFiled: May 23, 2008Publication date: November 27, 2008Applicant: DONGBU HITEK CO., LTD.Inventor: Tae-Woong Jeong
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Publication number: 20080157167Abstract: Embodiments relate to a flash memory device and to method of fabricating a flash memory device is disclosed. According to embodiments, a method may include forming a device isolation layer on a semiconductor substrate to define active regions, forming floating gate patterns on the active regions, forming the photoresist patterns on the device isolation layer such that the photoresist patterns have side walls higher than the floating gate patterns, forming spacer patterns at the side walls of the photoresist patterns such that the spacer patterns partially cover the floating gate patterns, and etching the floating gate patterns by a predetermined depth using the spacer patterns as an etching mask.Type: ApplicationFiled: December 21, 2007Publication date: July 3, 2008Inventor: Tae-Woong Jeong