Patents by Inventor Tae Yeon Yeo

Tae Yeon Yeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120217576
    Abstract: A semiconductor device and a method for forming the same are disclosed. According to the semiconductor device and the method for forming the same, a contact hole spacer is formed only over a contact hole sidewall such that a lower part of a contact plug is formed to have large critical dimension and therefore contact resistance is increased, and an upper spacer is not lost in a process of forming a contact hole sidewall spacer so as to prevent a Self Align Contact (SAC) failure from occurring. The semiconductor device includes a contact hole formed over a semiconductor substrate, a first conductive layer formed at a bottom region of the contact hole and a lower part of sidewalls of the contact hole, a spacer formed over the sidewalls of the contact hole, and a second conductive layer buried in the contact hole including the first conductive layer and the spacer.
    Type: Application
    Filed: September 22, 2011
    Publication date: August 30, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Tae Yeon YEO
  • Publication number: 20110260240
    Abstract: Disclosed herein are a semiconductor device and a method for manufacturing the same. The method includes forming a gate structure using a carbon nano tube (CNT). In order to prevent reduction of the gate resistance and the short channel effect, a CNT gate having a grown CNT pattern with a half-cylinder shape is formed over a recess of a semiconductor substrate. The CNT gate has the same effect as a recess gate, and can prevent the short channel effect, improve the speed, and the lower power characteristic of semiconductor devices.
    Type: Application
    Filed: July 6, 2011
    Publication date: October 27, 2011
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Chi Hwan Jang, Tae Yeon Yeo
  • Patent number: 8030140
    Abstract: A method for manufacturing a semiconductor device comprises forming an insulating layer on a polymer substrate, growing a germanium layer on the insulating layer, forming a gate pattern on the germanium layer, forming a metal layer on the germanium layer including the gate pattern, annealing the metal layer to form a compound layer mixed with the metal layer and the germanium layer, and forming a contact by etching the metal layer.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 4, 2011
    Assignee: Hynix Semiconductor Inc
    Inventors: Tae Yeon Yeo, Chi Hwan Jang
  • Patent number: 7998850
    Abstract: Disclosed herein are a semiconductor device and a method for manufacturing the same. The method includes forming a gate structure using a carbon nano tube (CNT). In order to prevent reduction of the gate resistance and the short channel effect, a CNT gate having a grown CNT pattern with a half-cylinder shape is formed over a recess of a semiconductor substrate. The CNT gate has the same effect as a recess gate, and can prevent the short channel effect, improve the speed, and the lower power characteristic of semiconductor devices.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: August 16, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Chi Hwan Jang, Tae Yeon Yeo
  • Publication number: 20100197084
    Abstract: A method for manufacturing a semiconductor device comprises forming an insulating layer on a polymer substrate, growing a germanium layer on the insulating layer, forming a gate pattern on the germanium layer, forming a metal layer on the germanium layer including the gate pattern, annealing the metal layer to form a compound layer mixed with the metal layer and the germanium layer, and forming a contact by etching the metal layer.
    Type: Application
    Filed: December 28, 2009
    Publication date: August 5, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Tae Yeon YEO, Chi Hwan JANG
  • Publication number: 20090273025
    Abstract: Disclosed herein are a semiconductor device and a method for manufacturing the same. The method includes forming a gate structure using a carbon nano tube (CNT). In order to prevent reduction of the gate resistance and the short channel effect, a CNT gate having a grown CNT pattern with a half-cylinder shape is formed over a recess of a semiconductor substrate. The CNT gate has the same effect as a recess gate, and can prevent the short channel effect, improve the speed, and the lower power characteristic of semiconductor devices.
    Type: Application
    Filed: December 3, 2008
    Publication date: November 5, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Chi Hwan Jang, Tae Yeon Yeo