Abstract: Disclosed is a method of controlling the operation of a fuel cell triple cogeneration system configured to supply power and cooling heat to a data center, the method including detecting change in a power load or a cooling heat load of the data center and adjusting electrical energy and cooling capacity of the fuel cell triple cogeneration system.

Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a stackable semiconductor device with small size and fine pitch and a method of manufacturing thereof.

Abstract: A data receiver, which communicates with a data transmitter through a plurality of lanes, includes: a first reception unit which receives first data through a first lane; a second reception unit which receives second data through a second lane; and a detector which compares the first data and the second data to detect a skew between the first lane and the second lane. The first reception unit includes a first clock data recovery unit which recovers a first clock and first payload data from the first data. The first reception unit controls a loop speed of the first clock data recovery unit based on a skew level of the skew.

Abstract: A semiconductor device including a substrate; a lower structure including a sealing layer on the substrate and a support layer on the sealing layer, the sealing layer and the support layer both including a semiconductor material; a mold structure on the lower structure and having an interlayer insulating film and a conductive film alternately stacked therein; a channel hole penetrating the mold structure; a channel structure extending along sidewalls of the channel hole; an isolation trench penetrating the mold structure and extending into the lower structure; and a poly liner extending along sidewalls of the isolation trench, the poly liner being connected to the lower structure and including the semiconductor material.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a via contact on a substrate. The substrate may include an upper surface facing the via contact, and the via contact may be in the first insulating layer and may include a lower surface facing the substrate and an upper surface opposite to the lower surface. The methods may also include forming a second insulating layer and a metallic wire on the via contact. The metallic wire may be in the second insulating layer and may include a lower surface that faces the substrate and contacts the upper surface of the via contact. Both the lower surface of the metallic wire and an interface between the metallic wire and the via contact may have a first width in a horizontal direction that is parallel to the upper surface of the substrate.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a via contact on a substrate. The substrate may include an upper surface facing the via contact, and the via contact may be in the first insulating layer and may include a lower surface facing the substrate and an upper surface opposite to the lower surface. The methods may also include forming a second insulating layer and a metallic wire on the via contact. The metallic wire may be in the second insulating layer and may include a lower surface that faces the substrate and contacts the upper surface of the via contact. Both the lower surface of the metallic wire and an interface between the metallic wire and the via contact may have a first width in a horizontal direction that is parallel to the upper surface of the substrate.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a via contact on a substrate. The substrate may include an upper surface facing the via contact, and the via contact may be in the first insulating layer and may include a lower surface facing the substrate and an upper surface opposite to the lower surface. The methods may also include forming a second insulating layer and a metallic wire on the via contact. The metallic wire may be in the second insulating layer and may include a lower surface that faces the substrate and contacts the upper surface of the via contact. Both the lower surface of the metallic wire and an interface between the metallic wire and the via contact may have a first width in a horizontal direction that is parallel to the upper surface of the substrate.

Abstract: A semiconductor device is provided. The semiconductor device includes a first wiring and a second wiring disposed at a first metal level, a third wiring and a fourth wiring disposed at a second metal level different from the first metal level, a first via which directly connects the first wiring and the third wiring, a fifth wiring disposed at a third metal level between the first metal level and the second metal level and connected to the second wiring, and a second via which directly connects the fourth wiring and the fifth wiring.

Abstract: Integrated circuit devices and methods of forming the same are provided. The methods of forming an integrated circuit device may include forming a first insulating layer and a via contact on a substrate. The substrate may include an upper surface facing the via contact, and the via contact may be in the first insulating layer and may include a lower surface facing the substrate and an upper surface opposite to the lower surface. The methods may also include forming a second insulating layer and a metallic wire on the via contact. The metallic wire may be in the second insulating layer and may include a lower surface that faces the substrate and contacts the upper surface of the via contact. Both the lower surface of the metallic wire and an interface between the metallic wire and the via contact may have a first width in a horizontal direction that is parallel to the upper surface of the substrate.

Abstract: A semiconductor device is provided. The semiconductor device includes a first wiring and a second wiring disposed at a first metal level, a third wiring and a fourth wiring disposed at a second metal level different from the first metal level, a first via which directly connects the first wiring and the third wiring, a fifth wiring disposed at a third metal level between the first metal level and the second metal level and connected to the second wiring, and a second via which directly connects the fourth wiring and the fifth wiring.