Patents by Inventor Tae Youn

Tae Youn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9952409
    Abstract: There is provided an optical imaging system including a first lens, a second lens, a third lens, a fourth lens, a fifth lens, and a sixth lens. The first lens includes a negative refractive power and a concave object-side surface. The second lens includes a concave object-side surface. The fourth lens includes a negative refractive power. The sixth lens includes an inflection point formed on an image-side surface thereof. The first to sixth lenses are sequentially disposed from an object side toward an imaging plane.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Tae Youn Lee
  • Patent number: 9942374
    Abstract: An apparatus and method for executing a shortcut function in a portable terminal are provided, in which a display is included, a memory stores at least one drag pattern, a hold screen shortcut list, and a volume control menu, and a controller displays a hold screen by executing a hold function, recognizes a drag pattern received from a user, compares the recognized drag pattern with the stored at least one drag pattern, and executes the hold screen shortcut function for executing the shortcut function during executing the hold function when the recognized drag pattern is identical to a first drag pattern among the stored at least one drag pattern.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: April 10, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Geun Ko, Tae-Youn Kwon, Yi-Kyu Min, Kyung-Goo Lee, Byoung-Il Son
  • Publication number: 20180083614
    Abstract: A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.
    Type: Application
    Filed: September 18, 2017
    Publication date: March 22, 2018
    Inventors: Christopher N. Brindle, Michael A. Stuber, Dylan J. Kelly, Clint L. Kemerling, George Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribisnky, Tae Youn Kim
  • Publication number: 20180074296
    Abstract: An optical imaging system includes a first lens having a positive refractive power, a second lens having a negative refractive power, a third lens having a negative refractive power, a fourth lens, a fifth lens, and a sixth lens having a positive refractive power and having a convex image-side shape, sequentially arranged in a direction from an object side of the optical imaging system to an imaging plane of the optical imaging system.
    Type: Application
    Filed: March 23, 2017
    Publication date: March 15, 2018
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae Youn LEE, Yong Joo JO
  • Publication number: 20180074297
    Abstract: An optical imaging system includes lenses sequentially disposed from an object side toward an imaging plane. A stop is disposed between a third lens and a fourth lens. An object-side surface of the third lens may be concave, and a ratio TL/f of a distance TL from an object-side surface of a first lens to an imaging plane with respect to an overall focal length f may be greater than 0.7 and less than 1.0.
    Type: Application
    Filed: March 24, 2017
    Publication date: March 15, 2018
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Tae Youn LEE, Yong Joo JO
  • Publication number: 20180067149
    Abstract: Disclosed is a control line diagnostic apparatus for diagnosing a control line of a driver circuit in which a driven load is driven due to a current flowing through the control line from a first high-potential node to a first low-potential node when a driving switch having a higher potential than a potential of the driven load is turned on, the control line diagnostic apparatus including a first diagnostic line having an end connected to a first node provided on the control line and the other end connected to a second high-potential node, and including a first resistor, a second resistor, and a first diode connected to one another in series, a second diagnostic line having an end connected to the first node and the other end connected to a second low-potential node, and including a third resistor, a voltage measurement unit configured to measure a voltage of a second node provided between the first and second resistors, and a control unit configured to set predetermined operation modes by controlling the driv
    Type: Application
    Filed: July 1, 2016
    Publication date: March 8, 2018
    Applicant: LG CHEM, LTD.
    Inventors: Woo-Jung KIM, Tae-Youn KIM
  • Publication number: 20180046210
    Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 15, 2018
    Inventors: Tae Youn Kim, Robert Mark Englekirk
  • Patent number: 9887695
    Abstract: A circuit and method for controlling charge injection in a circuit are disclosed. In one embodiment, the circuit and method are employed in a semiconductor-on-insulator (SOI) Radio Frequency (RF) switch. In one embodiment, an SOI RF switch comprises a plurality of switching transistors coupled in series, referred to as “stacked” transistors, and implemented as a monolithic integrated circuit on an SOI substrate. Charge injection control elements are coupled to receive injected charge from resistively-isolated nodes located between the switching transistors, and to convey the injected charge to at least one node that is not resistively-isolated. In one embodiment, the charge injection control elements comprise resistors. In another embodiment, the charge injection control elements comprise transistors.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: February 6, 2018
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Alexander Dribinsky, Tae Youn Kim, Dylan J. Kelly, Christopher N. Brindle
  • Publication number: 20180006610
    Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa
    Type: Application
    Filed: May 22, 2017
    Publication date: January 4, 2018
    Inventors: Tae Youn Kim, Robert Mark Englekirk, Dylan J. Kelly
  • Patent number: 9823443
    Abstract: An imaging lens is provided. The imaging lens includes, in an order from an object side to an image plane side, a first lens having an object side surface that is convex and having a positive refractive power, a second lens having a positive or negative refractive power, a third lens having a positive or negative refractive power, a fourth lens having a negative refractive power, and a fifth lens having a positive or negative refractive power, wherein an image side surface of the fifth lens has a concave center portion and has at least one inflection point, and the imaging lens satisfies a condition that ?0.25?(Y?yp)/yp??0.05, where Y denotes an image height of a real chief ray, and yp denotes an image height of a paraxial chief ray.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: November 21, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwan-seon Lee, Tae-youn Lee
  • Publication number: 20170329105
    Abstract: An optical imaging system includes a first lens, a second lens, a third lens, a fourth lens, and a fifth lens. The first lens has positive refractive power and a convex image-side surface. The second lens has negative refractive power. The third lens has negative refractive power. The fourth lens has negative refractive power and an inflection point formed on an image-side surface thereof. The fifth lens has positive refractive power and a convex image-side surface.
    Type: Application
    Filed: December 5, 2016
    Publication date: November 16, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Youn LEE, Yong Joo JO
  • Patent number: 9778669
    Abstract: Embodiments of signal bias generators and regulators are described generally herein. Other embodiments may be described and claimed.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: October 3, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Tae Youn Kim, Robert Mark Englekirk
  • Publication number: 20170236946
    Abstract: A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET.
    Type: Application
    Filed: January 30, 2017
    Publication date: August 17, 2017
    Inventors: Michael A. Stuber, Christopher N. Brindle, Dylan J. Kelly, Clint L. Kemerling, George P. Imthurn, Robert B. Welstand, Mark L. Burgener, Alexander Dribinsky, Tae Youn Kim
  • Publication number: 20170223482
    Abstract: An electronic device is provided. The electronic device includes a housing, a communication circuit configured to perform short range communication with a mobile device by using a first communication channel and perform wireless communication with an external output device by using a second communication channel and a control circuit configured to, when the mobile device is located on or in close proximity to the housing, obtain content that is being output by the mobile device through the first communication channel and transmit the obtained content to the external output device through the second communication channel.
    Type: Application
    Filed: January 30, 2017
    Publication date: August 3, 2017
    Inventors: Hyun Mi PARK, Do Hyoung KIM, Tae Youn KIM, Hee Seon SO, Ka Won CHEON
  • Publication number: 20170212337
    Abstract: A zoom optical system includes a first lens group, a position of which with respect to an imaging plane is adjustable, and including first and second lenses. The zoom optical system also includes a second lens group of which a position with respect to the imaging plane is adjustable and includes third to fifth lenses. The zoom optical system further includes a third lens group including a sixth lens. An object-side surface of the first lens is convex.
    Type: Application
    Filed: October 5, 2016
    Publication date: July 27, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Youn LEE, Jung Hui KO
  • Publication number: 20170184817
    Abstract: An optical imaging system includes a first lens including a negative refractive power and a convex object-side surface, and a second lens including a convex object-side surface and a convex image-side surface. The optical imaging system also includes a third lens including a negative refractive power and a convex object-side surface, a fourth lens including a convex image-side surface, a fifth lens, and a sixth lens including an inflection point formed on an image-side surface thereof. The first to sixth lenses are sequentially disposed in an optical-axis direction.
    Type: Application
    Filed: June 23, 2016
    Publication date: June 29, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Tae Youn LEE
  • Publication number: 20170170721
    Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa
    Type: Application
    Filed: March 4, 2015
    Publication date: June 15, 2017
    Inventors: Tae Youn Kim, Robert Mark Englekirk, Dylan J. Kelly
  • Patent number: 9660590
    Abstract: A bias generation method or apparatus defined by any one or any practical combination of numerous features that contribute to low noise and/or high efficiency biasing, including: having a charge pump control clock output with a waveform having limited harmonic content or distortion compared to a sine wave; having a ring oscillator to generating a charge pump clock that includes inverters current limited by cascode devices and achieves substantially rail-to-rail output amplitude; having a differential ring oscillator with optional startup and/or phase locking features to produce two phase outputs suitably matched and in adequate phase opposition; having a ring oscillator of less than five stages generating a charge pump clock; capacitively coupling the clock output(s) to some or all of the charge transfer capacitor switches; biasing an FET, which is capacitively coupled to a drive signal, to a bias voltage via an “active bias resistor” circuit that conducts between output terminals only during portions of a wa
    Type: Grant
    Filed: March 4, 2015
    Date of Patent: May 23, 2017
    Assignee: Peregrine Semiconductor Corporation
    Inventors: Tae Youn Kim, Robert Mark Englekirk, Dylan J. Kelly
  • Publication number: 20170108662
    Abstract: An optical imaging system includes a first lens group and a second lens group. The first lens group includes a first lens and a second lens. The second lens group includes a third lens, a fourth lens, a fifth lens, a sixth lens, and a seventh lens. The first to seventh lenses are sequentially disposed from an object side toward an imaging plane. The optical imaging system satisfies TL/2Y<1.3, where TL is a distance from an object-side surface of the first lens to the imaging plane, and 2Y is a diagonal length of the imaging plane.
    Type: Application
    Filed: March 30, 2016
    Publication date: April 20, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Tae Youn LEE
  • Publication number: 20170108666
    Abstract: There is provided an optical imaging system including a first lens, a second lens, a third lens, a fourth lens, a fifth lens, and a sixth lens. The first lens includes a negative refractive power and a concave object-side surface. The second lens includes a concave object-side surface. The fourth lens includes a negative refractive power. The sixth lens includes an inflection point formed on an image-side surface thereof. The first to sixth lenses are sequentially disposed from an object side toward an imaging plane.
    Type: Application
    Filed: June 21, 2016
    Publication date: April 20, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Tae Youn LEE