Patents by Inventor Taeg Hyun AN
Taeg Hyun AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230415769Abstract: Disclosed are a method, a device, and a vehicle for collecting vehicle data for autonomous driving. The method of collecting vehicle data includes: acquiring sensor data around a vehicle; outputting a recognition redundancy value based on training data that is based on the acquired sensor data and previously accumulated sensor data; receiving a unique situation message from a peripheral device; determining whether to collect driving data including the acquired sensor data based on the recognition redundancy value and the unique situation message; and collecting and managing the driving data in response to the collection of the driving data.Type: ApplicationFiled: January 24, 2023Publication date: December 28, 2023Applicant: Electronics and Telecommunications Research InstituteInventor: Taeg Hyun AN
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Patent number: 11507783Abstract: Disclosed herein are an object recognition apparatus of an automated driving system using error removal based on object classification and a method using the same. The object recognition method is configured to train a multi-object classification model based on deep learning using training data including a data set corresponding to a noise class, into which a false-positive object is classified, among classes classified by the types of objects, to acquire a point cloud and image data respectively using a LiDAR sensor and a camera provided in an autonomous vehicle, to extract a crop image, corresponding to at least one object recognized based on the point cloud, from the image data and input the same to the multi-object classification model, and to remove a false-positive object classified into the noise class, among the at least one object, by the multi-object classification model.Type: GrantFiled: July 20, 2021Date of Patent: November 22, 2022Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong-Jin Lee, Do-Wook Kang, Jungyu Kang, Joo-Young Kim, Kyoung-Wook Min, Jae-Hyuck Park, Kyung-Bok Sung, Yoo-Seung Song, Taeg-Hyun An, Yong-Woo Jo, Doo-Seop Choi, Jeong-Dan Choi, Seung-Jun Han
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Publication number: 20220164609Abstract: Disclosed herein are an object recognition apparatus of an automated driving system using error removal based on object classification and a method using the same. The object recognition method is configured to train a multi-object classification model based on deep learning using training data including a data set corresponding to a noise class, into which a false-positive object is classified, among classes classified by the types of objects, to acquire a point cloud and image data respectively using a LiDAR sensor and a camera provided in an autonomous vehicle, to extract a crop image, corresponding to at least one object recognized based on the point cloud, from the image data and input the same to the multi-object classification model, and to remove a false-positive object classified into the noise class, among the at least one object, by the multi-object classification model.Type: ApplicationFiled: July 20, 2021Publication date: May 26, 2022Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Dong-Jin LEE, Do-Wook KANG, Jungyu KANG, Joo-Young KIM, Kyoung-Wook MIN, Jae-Hyuck PARK, Kyung-Bok SUNG, Yoo-Seung SONG, Taeg-Hyun AN, Yong-Woo JO, Doo-Seop CHOI, Jeong-Dan CHOI, Seung-Jun HAN
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Publication number: 20200174492Abstract: Provided is an autonomous driving technology in which the autonomous driving method includes planning global travelling such that guidance information of global node points is acquired, determining a location of a subject vehicle, generating a first local high-definition map such that the first local high-definition map is generated for at least one section in a global-travelling planned route included in the planning of the global travelling using at least one of a road view and an aerial view provided from a map server, planning a local route for autonomous driving using the first local high-definition map, and controlling the subject vehicle according to the planning of the local route to perform the autonomous driving.Type: ApplicationFiled: November 27, 2019Publication date: June 4, 2020Applicant: Electronics and Telecommunications Research InstituteInventors: Dong Jin LEE, Jeong Dan CHOI, Jung Gyu KANG, Joo Young KIM, Kyoung Wook MIN, Kyung Bok SUNG, Taeg Hyun AN, Bong Jin OH, Yong Woo JO, Doo Seop CHOI, Seung Jun HAN
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Patent number: 8329548Abstract: A field transistor for electrostatic discharge (ESD) protection and method for making such a transistor is described. The field transistor includes a gate conductive layer pattern formed on a field oxide layer. Since the gate conductive layer pattern is formed on the field oxide layer, a thin gate insulating layer having a high possibility of insulation breakdown is not used. To form an inversion layer for providing a current path between source and drain regions, a field oxide layer is interposed to form low concentration source and drain regions overlapped by the gate conductive layer pattern.Type: GrantFiled: July 15, 2011Date of Patent: December 11, 2012Assignee: Fairchild Korea Semiconductor, Ldt.Inventors: Taeg-hyun Kang, Jun-hyeong Ryu, Jong-hwan Kim
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Patent number: 8203183Abstract: The present invention relates to an electrostatic discharge diode. The electrostatic discharge diode according to exemplary embodiment of the present invention includes: an N-type well formed on a substrate; an n? region formed on the N-type well; a plurality of p? regions penetrated and formed in the n? region; a plurality of n+ regions penetrated and formed in a first layer in which the n? region and a plurality of the p? regions are formed; a plurality of n+ regions penetrated and formed in a first layer in which the n? region and a plurality of the p? regions are formed; and a plurality of p+ regions penetrated and formed in the first layer, wherein a first n+ region among a plurality of the n+ regions and a first p+ region corresponding to the first n+ region are penetrated and formed in each other region of the corresponding first p? region among a plurality of the p? regions.Type: GrantFiled: September 10, 2009Date of Patent: June 19, 2012Assignee: Fairchild Korea Semiconductor Ltd.Inventors: Jun-Hyeong Ryu, Taeg-Hyun Kang, Moon-Ho Kim
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Publication number: 20110269285Abstract: A field transistor for electrostatic discharge (ESD) protection and method for making such a transistor is described. The field transistor includes a gate conductive layer pattern formed on a field oxide layer. Since the gate conductive layer pattern is formed on the field oxide layer, a thin gate insulating layer having a high possibility of insulation breakdown is not used. To form an inversion layer for providing a current path between source and drain regions, a field oxide layer is interposed to form low concentration source and drain regions overlapped by the gate conductive layer pattern.Type: ApplicationFiled: July 15, 2011Publication date: November 3, 2011Inventors: Taeg-hyun Kang, Jun-hyeong Ryu, Jong-hwan Kim
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Patent number: 8049306Abstract: A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.Type: GrantFiled: June 7, 2010Date of Patent: November 1, 2011Assignee: Fairchild Korea Semiconductor, Ltd.Inventors: Taeg-hyun Kang, Sung-son Yun
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Patent number: 8008725Abstract: A field transistor for electrostatic discharge (ESD) protection and method for making such a transistor is described. The field transistor includes a gate conductive layer pattern formed on a field oxide layer. Since the gate conductive layer pattern is formed on the field oxide layer, a thin gate insulating layer having a high possibility of insulation breakdown is not used. To form an inversion layer for providing a current path between source and drain regions, a field oxide layer is interposed to form low concentration source and drain regions overlapped by the gate conductive layer pattern.Type: GrantFiled: February 6, 2002Date of Patent: August 30, 2011Assignee: Fairchild Korea Semiconductor LtdInventors: Taeg-hyun Kang, Jun-hyeong Ryu, Jong-hwan Kim
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Publication number: 20100244756Abstract: A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.Type: ApplicationFiled: June 7, 2010Publication date: September 30, 2010Inventors: Taeg-hyun Kang, Sung-son Yun
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Patent number: 7732858Abstract: A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.Type: GrantFiled: November 22, 2006Date of Patent: June 8, 2010Assignee: Fairchild Korea Semiconductor, Ltd.Inventors: Taeg-hyun Kang, Sung-son Yun
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Publication number: 20100065884Abstract: The present invention relates to an electrostatic discharge diode. The electrostatic discharge diode according to exemplary embodiment of the present invention includes: an N-type well formed on a substrate; an n? region formed on the N-type well; a plurality of p? regions penetrated and formed in the n? region; a plurality of n+ regions penetrated and formed in a first layer in which the n? region and a plurality of the p? regions are formed; a plurality of n+ regions penetrated and formed in a first layer in which the n? region and a plurality of the p? regions are formed; and a plurality of p+ regions penetrated and formed in the first layer, wherein a first n+ region among a plurality of the n+ regions and a first p+ region corresponding to the first n+ region are penetrated and formed in each other region of the corresponding first p? region among a plurality of the p? regions.Type: ApplicationFiled: September 10, 2009Publication date: March 18, 2010Inventors: Jun-Hyeong RYU, Taeg-Hyun KANG, Moon-Ho KIM
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Publication number: 20070132008Abstract: A high voltage integrated circuit contains a freewheeling diode embedded in a transistor. It further includes a control block controlling a high voltage transistor and a power block—including the high voltage transistor—isolated from the control block by a device isolation region. The high voltage transistor includes a semiconductor substrate of a first conductivity type, a epitaxial layer of a second conductivity type on the semiconductor substrate, a buried layer of the second conductivity type between the semiconductor substrate and the epitaxial layer, a collector region of the second conductivity type on the buried layer, a base region of the first conductivity type on the epitaxial layer, and an emitter region of the second conductivity type formed in the base region. The power block further includes a deep impurity region of the first conductivity type near the collector region to form a PN junction.Type: ApplicationFiled: November 22, 2006Publication date: June 14, 2007Inventors: Taeg-hyun Kang, Sung-son Yun
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Publication number: 20020113269Abstract: A field transistor for electrostatic discharge (ESD) protection and method for making such a transistor is described. The field transistor includes a gate conductive layer pattern formed on a field oxide layer. Since the gate conductive layer pattern is formed on the field oxide layer, a thin gate insulating layer having a high possibility of insulation breakdown is not used. To form an inversion layer for providing a current path between source and drain regions, a field oxide layer is interposed to form low concentration source and drain regions overlapped by the gate conductive layer pattern.Type: ApplicationFiled: February 6, 2002Publication date: August 22, 2002Inventors: Taeg-Hyun Kang, Jun-Hyeong Ryu, Jong-Hwan Kim