Abstract: A display device includes a display panel and the display panel includes a pixel. The pixel includes a light emitting unit including at least one light emitting element, a driving transistor providing a driving current corresponding to a data signal to the light emitting unit, and a first transistor electrically connected between both ends of the light emitting unit. A driver provides the data signal to the pixel and provides a duty control signal to the first transistor. The driver varies a voltage level of the data signal in a first grayscale section in which a grayscale corresponding to the data signal is greater than or equal to a reference grayscale, and varies a duty ratio of the duty control signal in a second grayscale section in which the grayscale is less than the reference grayscale.

Abstract: A display device includes a pixel electrically connected to a first gate line and a second gate line and disposed in a first row, a pixel electrically connected to the second gate line and a reset line and disposed in a second row after the first row, a pixel electrically connected to a third gate line and a fourth gate line and disposed in a third row after the second row, and a gate driver supplying first to fourth gate signals to the first to fourth gate lines and supplying a reset signal to the reset line. The gate driver supplies the reset signal and the third gate signal of a same timing during an active period, and supplies the reset signal having a high level and the third gate signal having a low level during a rest period.

Abstract: A display device includes: a pixel unit including a plurality of pixels; a data driver configured to supply a data voltage to the pixels through data lines based on a source output enable signal; and a reference voltage controller configured to supply a reference voltage to the pixels through reference voltage lines, wherein each of the pixels includes a light emitting element between a first power source line and a second power source line, and wherein the reference voltage controller is configured to compensate for the reference voltage based on the source output enable signal, and to supply a compensated reference voltage to an anode electrode of the light emitting element.

Abstract: A display device includes a display panel including data lines and pixels electrically connected to the data lines. The data driver supplies data signals to the data lines. The data driver includes: a first output buffer electrically connected to a first data line of the data lines, the first output buffer outputting a first data signal to the first data line; and a first comparator electrically connected to an output terminal of the first output buffer, the first comparator comparing a first slew rate of the first data signal with a first reference slew rate.

Abstract: A flexible film includes first input pad parts and second input pad parts, first output pad parts corresponding to the first input pad parts and second output pad parts corresponding to the second input pad parts, a first voltage line supplying a first voltage received from the first input pad parts to the first output pad parts, and a second voltage line supplying a second voltage received from the second input pad parts and the second voltage being lower than the first voltage to the second output pad parts. The first voltage line includes first vertical voltage lines electrically connected between the first input pad parts and the first output pad parts, and first horizontal voltage lines electrically connecting adjacent first vertical voltage lines of the first vertical voltage lines to each other.

Abstract: A display device includes a display panel and the display panel includes a pixel. The pixel includes a light emitting unit including at least one light emitting element, a driving transistor providing a driving current corresponding to a data signal to the light emitting unit, and a first transistor electrically connected between both ends of the light emitting unit. A driver provides the data signal to the pixel and provides a duty control signal to the first transistor. The driver varies a voltage level of the data signal in a first grayscale section in which a grayscale corresponding to the data signal is greater than or equal to a reference grayscale, and varies a duty ratio of the duty control signal in a second grayscale section in which the grayscale is less than the reference grayscale.

Abstract: A display device includes a display panel including data lines, line capacitors respectively connected to the data lines, and pixels receiving a data voltage from the data lines, and a data driver supplying the data voltage to the pixels through the data lines and supplying different charging voltages respectively to the line capacitors through the data line. The data driver senses voltage change of at least one of the data lines occurring in case that at least one of the line capacitors is charged or discharged.

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

Abstract: A display device includes a display panel including a pixel including a light emitting element emitting light and electrically connected to a data line and a sensing line, a timing controller varying a driving frequency of the display panel based on an input frequency of digital video data, and a data driver supplying a data voltage to the data line based on the digital video data during a data addressing period of a frame period and receiving a sensing signal from the sensing line during a sensing period. The data driver electrically connects the sensing line to an initialization voltage line during the data addressing period in case that the digital video data is changed, and electrically connects the sensing line to a high impedance during the data addressing period in case that the digital video data is not changed.

Abstract: A display device includes: a pixel unit including a plurality of pixels; a data driver configured to supply a data voltage to the pixels through data lines based on a source output enable signal; and a reference voltage controller configured to supply a reference voltage to the pixels through reference voltage lines, wherein each of the pixels includes a light emitting element between a first power source line and a second power source line, and wherein the reference voltage controller is configured to compensate for the reference voltage based on the source output enable signal, and to supply a compensated reference voltage to an anode electrode of the light emitting element.

Abstract: A display device includes: a plurality of pixels coupled to data lines and sensing lines; a data driver configured to supply one of an image data signal and a sensing data signal to the data lines; a voltage supply configured to supply an initialization voltage to the pixels through the sensing lines; and a sensing circuit configured to receive a sensing value from at least one of the pixels through the sensing lines, and compare the sensing value with a sensing reference value to generate a sensing voltage control signal to control at least one of the sensing data signal or the initialization voltage.

Abstract: The display device includes a display panel, a printed circuit board on which a timing controller is mounted, and a connection film on which a data driver is mounted. Pixels and a gate driving circuit are disposed in a display area of the display panel. The connection film includes output lines connecting the data driver and the display panel, and first connection lines connecting the printed circuit board and the display panel. The first connection lines overlap the first area on which the data driver is mounted and are disposed between the output lines.

Abstract: A display device includes a display panel including data lines and pixels electrically connected to the data lines. The data driver supplies data signals to the data lines. The data driver includes: a first output buffer electrically connected to a first data line of the data lines, the first output buffer outputting a first data signal to the first data line; and a first comparator electrically connected to an output terminal of the first output buffer, the first comparator comparing a first slew rate of the first data signal with a first reference slew rate.

Abstract: A display device includes pixels; a sensing block generating first sensing data during a first sensing period, and generating second sensing data and third sensing data during a second sensing period; and a timing controller compensating first image data with second image data based on the first sensing data, the second sensing data, and the third sensing data. The sensing block generates the first sensing data corresponding to an initial channel voltage applied to each of sensing channels and at least one auxiliary sensing channel during the first sensing period, generates the second sensing data by sensing characteristic information of the pixels corresponding to an initialization voltage applied to the pixels during the second sensing period, and generates the third sensing data corresponding to a reference voltage applied to the at least one auxiliary sensing channel during the second sensing period.

Abstract: A display device includes a display panel including a pixel including a light emitting element emitting light and electrically connected to a data line and a sensing line, a timing controller varying a driving frequency of the display panel based on an input frequency of digital video data, and a data driver supplying a data voltage to the data line based on the digital video data during a data addressing period of a frame period and receiving a sensing signal from the sensing line during a sensing period. The data driver electrically connects the sensing line to an initialization voltage line during the data addressing period in case that the digital video data is changed, and electrically connects the sensing line to a high impedance during the data addressing period in case that the digital video data is not changed.

Abstract: A display device includes a display panel having pixels. A timing controller generates a first control signal and data control signals. Data driving circuits each recover a data signal from a corresponding data control signal of the data control signals in response to the first control signal, generate a data voltage corresponding to the data signal, and provide the data voltage to the display panel. Each of the data driving circuits includes: a setting unit configured to acquire a setting value from the data control signal; an equalizer configured to compensate for distortion of the corresponding data control signal according to the setting value to output compensated data control signal; and a recoverer configured to recover a clock signal from the compensated data control signal and recover the data signal from the compensated data control signal based on the clock signal.

Abstract: A display device includes a display panel having pixels. A timing controller generates a first control signal and data control signals. Data driving circuits each recover a data signal from a corresponding data control signal of the data control signals in response to the first control signal, generate a data voltage corresponding to the data signal, and provide the data voltage to the display panel. Each of the data driving circuits includes: a setting unit configured to acquire a setting value from the data control signal; an equalizer configured to compensate for distortion of the corresponding data control signal according to the setting value to output compensated data control signal; and a recoverer configured to recover a clock signal from the compensated data control signal and recover the data signal from the compensated data control signal based on the clock signal.

Abstract: The display device includes a display panel, a printed circuit board on which a timing controller is mounted, and a connection film on which a data driver is mounted. Pixels and a gate driving circuit are disposed in a display area of the display panel. The connection film includes output lines connecting the data driver and the display panel, and first connection lines connecting the printed circuit board and the display panel. The first connection lines overlap the first area on which the data driver is mounted and are disposed between the output lines.

Abstract: A display device includes a display panel including a plurality of pixels, a controller for providing a clock-embedded data signal including image data in an active period and including a training pattern in a blank period, and a data driver for recovering the image data from the clock-embedded data signal based on an internal clock signal to provide data voltages corresponding to the image data to the plurality of pixels in the active period, and to perform a training operation for the internal clock signal using the training pattern included in the clock-embedded data signal in the blank period. The training pattern in the blank period includes a first training clock signal modulated with a first modulation period during a first time, and includes a second training clock signal modulated with a second modulation period different from the first modulation period after the first time.

Abstract: A display device includes a timing controller which supplies a clock training signal through a data clock signal line and a first control signal through a shared signal line in a first period of one frame, and supplies image data through the data clock signal line in a second period of the one frame, a data driver provided with data driving circuits which generate a clock signal based on the clock training signal and the first control signal in the first period, and generate data voltages based on the clock signal and the image data in the second period, and a pixel part which receives the data voltages from the data driver. The data driver may supply a second control signal indicating a reception state of the data driver to the timing controller through the shared signal line in the second period.