Abstract: A display device includes a first electrode and a second electrode which are spaced apart from each other on a substrate. A light emitting element is disposed between the first electrode and the second electrode. A light emitting element core of the light emitting element includes a first semiconductor layer, a second semiconductor layer spaced apart from the first semiconductor layer, and a light emitting layer disposed between the first semiconductor layer and the second semiconductor layer. A first element insulating layer surrounds a side surface of the light emitting element core. The first element insulating layer is an oxide insulating layer having a single crystalline structure.

Abstract: Disclosed herein is a substrate processing apparatus including a process chamber having a processing space defined therein to process a plurality of substrates, a gas injector provided on a upper side of the process chamber to inject a processing gas into the processing space, a plurality of substrate supports arranged inside the process chamber, the substrates being seated on the substrate supports, a substrate conveyor disposed in the process chamber to convey the plurality of substrates to different substrate supports among the substrate supports, and a substrate rotating part arranged to allow each of the plurality of substrates to be seated between neighboring ones of the plurality of substrate supports, and to rotate the substrates, wherein the substrate rotating part may include a tension adjuster disposed on at least a portion of the power transmitter to adjust a tension in the power transmitter.

Abstract: A display device includes a light emitting area, a non-light emitting area surrounding the light emitting area, and a separation area spaced apart from the light emitting area, the non-light emitting area disposed between the light emitting area and the separation area; a bank disposed in the non-light emitting area; a first alignment electrode and a second alignment electrode that extend from the light emitting area through the non-light emitting area to the separation area; light emitting elements electrically connected to at least one of the first alignment electrode and the second alignment electrode; a first contact electrode disposed in the separation area and electrically connected to the first alignment electrode; and a second contact electrode disposed in the separation area and electrically connected to the second alignment electrode.

Abstract: A light emitting element may include a light emitting stack pattern including a first semiconductor layer, an active layer, and a second semiconductor layer. An insulating film may surround an outer circumferential surface of the light emitting stack pattern. The insulating film may include a first layer, a second layer surrounding the first layer, and a third layer surrounding the second layer. The first layer and the third layer may include a same material.

Abstract: A display device includes a light emitting element disposed on a substrate and including a first end portion and a second end portion. The first electrode is electrically connected to the first end portion of the light emitting element. The second electrode is electrically connected to the second end portion of the light emitting element. A first semiconductor layer, a light emitting layer, a second semiconductor layer, and an electrode layer of the light emitting element are sequentially disposed along a longitudinal direction from the second end portion to the first end portion. An insulating film of the light emitting element covers side surfaces of the first semiconductor layer, the light emitting layer, the second semiconductor layer, and the electrode layer, and extends in parallel to the longitudinal direction. A shielding layer is disposed inside the insulating film.

Abstract: A storage device may receive a program command requesting to program target data, determine a foggy-program address and a fine-program address, receive the target data, copy the target data to a buffer, and foggy-program the target data to the foggy program address and fine-programs the target data to the fine-program address.

Abstract: The present disclosure relates to an apparatus and method for measuring the velocity of a surface wave using a laser ultrasound imaging technique. A method of measuring the velocity of a surface wave according to an embodiment of the present disclosure includes: emitting a laser pulse to a target material; obtaining wavefront image of a surface wave, which propagates on a surface of the target material due to the laser pulse, by emitting a probe beam to the target material; and determining a velocity of the surface wave based on variation of the wavefront image according to a time delay between the laser pulse and the probe beam.

Abstract: An automotive system includes a memory device and a controller. The memory device is installed in an automobile. The controller controls the memory device and an electronic device in the automobile. The controller controls the memory device to process a background operation during a time limit when a background operation trigger event may be detected.

Abstract: Provided herein is an electronic device including: a host configured to judge a possibility of occurrence of an SPO based on driving information of a transportation device, and determine an operation mode of a storage device to be an SPO protection mode or a performance mode based on the possibility of an SPO occurrence; a buffer memory device configured to temporarily store user data received from the host; a memory device configured to store the user data output from the buffer memory device; and a memory controller configured to set a size of the buffer memory device depending on the determined operation mode and to control the buffer memory device to output at least a part of the user data temporarily stored in the buffer memory device to the memory device based on an amount of the buffer memory device used.

Abstract: A storage device includes: a memory device including a plurality of system blocks for storing system data; and a memory controller configured to control the memory device to store cyclic system data that is cyclically provided from a host, in an open system block among the plurality of system blocks, and control the memory device to perform a garbage collection operation on the plurality of system blocks, when a size of data stored in the open system block reaches a predetermined size. The cyclic system data may include a plurality of data slices provided from the host at predetermined cycles. The predetermined size may be determined based on size of the cyclic system data provided for a period of time corresponding to a common multiple of the predetermined cycles.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may completely scan each of one or more target memory blocks among the plurality of memory blocks, once in each scan period to detect an error in data stored in the corresponding target memory block and may block an attempted second scan of each target memory block in a scan period in which the corresponding target memory block has already been scanned until the scan period is completed.

Abstract: A storage device may include: a memory device including a plurality of memory blocks; a buffer memory device to store event information; and a memory controller configured to: upon occurrence of the predetermined event while a write operation, store, in the buffer memory device, the event information for the event page, and control the memory device to perform a test read operation to read at least one page in the plurality of memory blocks except the event page, based on the event information; upon failure of the test read operation, control the memory device to perform a migration operation of moving, to a replacement block, data stored in valid pages except a page on which the test read operation has fails among pages included in a memory block on which the test read operation fails.

Abstract: A storage device may include: a memory device including a plurality of memory blocks; a buffer memory device to store event information; and a memory controller configured to: upon occurrence of the predetermined event while a write operation, store, in the buffer memory device, the event information for the event page, and control the memory device to perform a test read operation to read at least one page in the plurality of memory blocks except the event page, based on the event information; upon failure of the test read operation, control the memory device to perform a migration operation of moving, to a replacement block, data stored in valid pages except a page on which the test read operation has fails among pages included in a memory block on which the test read operation fails.

Abstract: A storage device includes: a memory device including a plurality of system blocks for storing system data; and a memory controller configured to control the memory device to store cyclic system data that is cyclically provided from a host, in an open system block among the plurality of system blocks, and control the memory device to perform a garbage collection operation on the plurality of system blocks, when a size of data stored in the open system block reaches a predetermined size. The cyclic system data may include a plurality of data slices provided from the host at predetermined cycles. The predetermined size may be determined based on size of the cyclic system data provided for a period of time corresponding to a common multiple of the predetermined cycles.

Abstract: Embodiments of the present disclosure relate to a memory system and an operating method thereof. According to the embodiments of the present disclosure, the memory system may completely scan each of one or more target memory blocks among the plurality of memory blocks, once in each scan period to detect an error in data stored in the corresponding target memory block and may block an attempted second scan of each target memory block in a scan period in which the corresponding target memory block has already been scanned until the scan period is completed.

Abstract: Embodiments of the present invention may provide a microchip applicable to an electrophoresis employing UV detection and a method of manufacturing the same. The microchip of the present invention has a glass channel plate, which is formed on an upper surface thereof with a loading channel and a separation channel and is provided on the upper surface thereof with an optical slit layer made of silicon except the channel region, and a glass reservoir plate, which is formed with sample solution reservoirs and buffer solution reservoirs. The loading channel and the separation channel are formed on the channel plate by deep reactive ion etching. The sample solution reservoirs and the buffer solution reservoirs are formed in the reservoir plate by sand blasting. The channel plate and the reservoir plate are combined by anodic bonding the optical slit layer and the reservoir plate. Electrodes for sample and electrodes for buffer are deposited by sputtering Pt with a shadow mask after anodic bonding.

Abstract: Embodiments of the present invention may provide a microchip applicable to an electrophoresis employing UV detection and a method of manufacturing the same. The microchip of the present invention has a glass channel plate, which is formed on an upper surface thereof with a loading channel and a separation channel and is provided on the upper surface thereof with an optical slit layer made of silicon except the channel region, and a glass reservoir plate, which is formed with sample solution reservoirs and buffer solution reservoirs. The loading channel and the separation channel are formed on the channel plate by deep reactive ion etching. The sample solution reservoirs and the buffer solution reservoirs are formed in the reservoir plate by sand blasting. The channel plate and the reservoir plate are combined by anodic bonding the optical slit layer and the reservoir plate. Electrodes for sample and electrodes for buffer are deposited by sputtering Pt with a shadow mask after anodic bonding.

Abstract: A system for manufacturing a print board assembly, which is implemented in a system having a computer for storing parts insertion instruction diagrams and displaying parts insertion instructions, and a soldering unit for soldering a printed circuit board, includes: assembling different types of the printed circuit boards from pieces of parts and inspecting them in a multitude of cells; installing different types of the printed circuit boards in carriers to assemble them separately according to the parts insertion instructions displayed by the computer of each cell, and moving them to the soldering unit through a transfer conveyor line; and returning the carriers having the printed circuit boards completely soldered to each cell identified for the carriers through a return conveyor line.

Abstract: A method of manufacturing a print board assembly, which is implemented in a system having a computer for storing parts insertion instruction diagrams and displaying parts insertion instructions, and a soldering unit for soldering a printed circuit board, includes the steps of: assembling different types of the printed circuit boards from pieces of parts and inspecting them in a multitude of cells; installing different types of the printed circuit boards in carriers to assemble them separately according to the parts insertion instructions displayed by the computer of each cell, and moving them to the soldering unit through a transfer conveyor line; and returning the carriers having the printed circuit boards completely soldered to each cell identified for the carriers through a return conveyor line.