Abstract: Provided herein may be a storage device for supporting dynamic allocation of memory and a method of operating the same. The storage device may include a plurality of memory dies, a state detector configured to detect respective memory states of the plurality of memory dies, a memory information storage configured to store defect information that is information about memory dies in which defects have occurred among the plurality of memory dies, and a memory controller configured to, in response to a memory die allocation request for performing an operation corresponding to an externally provided operation request, determine allocation of a memory die based on a result of comparison between each detected memory state and the defect information.

Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device including a plurality of zones, a memory device including a plurality of zones; a buffer memory device including a plurality of slots; and a memory controller including a plurality of zone buffers respectively corresponding to the plurality of zones. The memory controller may store write data in one or more of the plurality of slots, store map data corresponding to the write data in a zone buffer that corresponds to a zone in which the write data is to be stored, and then store the write data, which is stored in the one or more slots, in the zone corresponding to the zone buffer based on the map data stored in the zone buffer.

Abstract: Disclosed is an activation device. The activation device, which serves as a device coming into contact with an object to activate surrounding materials according to a dielectric barrier discharge principle, includes: a dielectric having a predetermined thickness and formed with an outer surface coming into contact with the object and an inner surface facing the outer surface; and an electrode provided inside the dielectric and having an outer surface facing the inner surface of the dielectric, wherein the outer surface of the electrode includes a contact area that comes into contact with the inner surface of the dielectric, and a non-contact area that does not come into contact with the inner surface of the dielectric.

Abstract: A phase-change memory controller controls a phase-change memory device. The phase-change memory controller includes a write control circuit configured to receive first write data of “N” bits (where “N” is a natural number greater than 2) to be written to the phase-change memory device to generate second write data composed of compressed data compressed with “M” bits (where “N” is a natural number smaller than “N”) and “0” padding data in which the rest “N-M” bits are filled with “0”.

Abstract: An autonomous driving safety system for sharing a risk-based operation design domain includes an autonomous driving system configured to control a vehicle driving unit according to information detected by a sensor unit to perform autonomous driving, in which the autonomous driving system includes an operation design domain update unit configured to evaluate a risk of at least one of a static operation design domain and a dynamic operation design domain recognized by the sensor unit while driving to update the operation design domain.

Abstract: A semiconductor die that operates using a first clock signal and a semiconductor die that operates using a second clock signal control transmission of data during operation periods using a mask circuit included in each semiconductor die to prevent or reduce the occurrence of data transmission and reception failure due to a difference in the clock signals between the semiconductor dies. Communication performance between the semiconductor dies is improved.

Abstract: A memory controller includes a plurality of processors, a memory device and a memory manager. The memory device includes a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned. The memory manager is configured to map a first buffer identifier to a first group identifier from among the group identifiers, select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, map the first buffer identifier to the one or more segments, and allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.

Abstract: A data receiving circuit includes a forwarded fast clock domain configured to output data transmitted from a data transmitting circuit in synchronization with a forwarded fast clock signal, and a local clock domain configured to generate a synchronized fetch enable signal in synchronization with a local fast clock signal and output the data transmitted from the forwarded fast clock domain in synchronization with a local slow clock.

Abstract: A phase-change memory controller controls a phase-change memory device. The phase-change memory controller includes a write control circuit configured to receive first write data of “N” bits (where “N” is a natural number greater than 2) to be written to the phase-change memory device to generate second write data composed of compressed data compressed with “M” bits (where “N” is a natural number smaller than “N”) and “0” padding data in which the rest “N-M” bits are filled with “0”.

Abstract: Provided herein may be a storage device for supporting dynamic allocation of memory and a method of operating the same. The storage device may include a plurality of memory dies, a state detector configured to detect respective memory states of the plurality of memory dies, a memory information storage configured to store defect information that is information about memory dies in which defects have occurred among the plurality of memory dies, and a memory controller configured to, in response to a memory die allocation request for performing an operation corresponding to an externally provided operation request, determine allocation of a memory die based on a result of comparison between each detected memory state and the defect information.

Abstract: According to an embodiment of the present disclosure, a storage device may include a memory device including a plurality of zones, a memory device including a plurality of zones; a buffer memory device including a plurality of slots; and a memory controller including a plurality of zone buffers respectively corresponding to the plurality of zones. The memory controller may store write data in one or more of the plurality of slots, store map data corresponding to the write data in a zone buffer that corresponds to a zone in which the write data is to be stored, and then store the write data, which is stored in the one or more slots, in the zone corresponding to the zone buffer based on the map data stored in the zone buffer.

Abstract: Provided is a method by which a second chip obtains a control code such as firmware in a memory controller having a chiplet-based structure. The memory controller includes a first chip configured to perform a first operation, a plurality of second chips configured to perform a second operation, a plurality of data links configured to connect the first chip and each of the plurality of second chips on a one-to-one basis and used for data transmission between the first chip and each of the plurality of second chips during normal operation after booting, a control link connected to the first chip and all the plurality of second chips and used to transmit a control code for performing the second operation of the plurality of second chips, and a memory connected to the first chip to store the control code of the plurality of second chips.

Abstract: An autonomous driving safety system for sharing a risk-based operation design domain includes an autonomous driving system configured to control a vehicle driving unit according to information detected by a sensor unit to perform autonomous driving, in which the autonomous driving system includes an operation design domain update unit configured to evaluate a risk of at least one of a static operation design domain and a dynamic operation design domain recognized by the sensor unit while driving to update the operation design domain.

Abstract: Disclosed is an odor removal device. The odor removal device includes: a case; an activation device installed in the case and coming into contact with an object to activate surrounding materials according to a dielectric barrier discharge principle, wherein the activation device includes: a dielectric having an outer surface exposed to an outside and provided as a curved surface; and an electrode positioned inside the dielectric in which power is applied to the electrode.

Abstract: A memory controller includes a plurality of processors, a memory device and a memory manager. The memory device includes a plurality of segments, which are divided into a plurality of segment groups, to which group identifiers are respectively assigned. The memory manager is configured to map a first buffer identifier to a first group identifier from among the group identifiers, select one or more segments only from a first segment group, to which the first group identifier is assigned among the plurality of segment groups, map the first buffer identifier to the one or more segments, and allocate, to a first processor from among the plurality of processors, the first buffer identifier and the one or more segments.

Abstract: An autonomous driving safety control system based on edge infrastructure includes an autonomous driving system controlling autonomous driving, an error detection unit detecting a fallback situation, and a safety controller driving a safety process for each fallback situation by interworking with an edge infrastructure when a fallback situation occurs, wherein the safety controller transmits a fallback situation and location information of a passenger through the edge infrastructure.

Abstract: Disclosed is an activation device. The activation device, which serves as a device coming into contact with an object to activate surrounding materials according to a dielectric barrier discharge principle, includes: a dielectric having a predetermined thickness and formed with an outer surface coming into contact with the object and an inner surface facing the outer surface; and an electrode provided inside the dielectric and having an outer surface facing the inner surface of the dielectric, wherein the outer surface of the electrode includes a contact area that comes into contact with the inner surface of the dielectric, and a non-contact area that does not come into contact with the inner surface of the dielectric.

Abstract: A movable curtain disinfection device according to an embodiment of the present invention includes frames installed on an upper portion of a support, spaced apart from each other to face each other, and configured to define a disinfection space for a curtain provided between the frames, rotary rollers provided so that a pair of rotary rollers thereof is mounted on an inner surface of each of the frames, the rotary rollers being configured to rotate so that the curtain passes through the disinfection space, rotary belts each configured to surround an outer portion of each of the pairs of rotary rollers, the rotary belts being configured to guide a movement of the curtain while rotating in conjunction with rotations of the rotary rollers, and disinfection modules disposed between the pairs of rotary rollers and configured to disinfect the curtain passing through the disinfection space.

Abstract: An oscillator device includes a touchpad, and an oscillator that includes an oscillation core having a second terminal configured to output an oscillation signal generated by the oscillation core based on an input to a first terminal of the oscillation core, a first capacitor connected between the first terminal and a ground, and a second capacitor connected between the second terminal and the ground, where the first capacitor is connected to the touchpad, and where a total capacitance of the first capacitor is different from a total capacitance of the second capacitor.

Abstract: A tunable oscillator includes a current bias circuit configured to generate a reference bias current, a variable voltage bias circuit configured to receive the reference bias current and generate a bias voltage varied based on a voltage control signal, an oscillation signal generator circuit configured to generate an oscillation signal based on the reference bias current and a switching control signal, and a switching control circuit configured to generate the switching control signal based on the bias voltage and the oscillation signal. A frequency of the oscillation signal is varied based on a magnitude of the bias voltage.