Abstract: Disclosed are methods of manufacturing a semiconductor device. The method of manufacturing one semiconductor device includes forming a transistor structure on a semiconductor substrate, forming a metal interconnection layer on the transistor structure, forming a protective layer on the metal interconnection layer, and implanting hydrogen ions into the semiconductor substrate having the protective layer by using a hydrogen ion implanter. Hydrogen ions are stably and effectively implanted into a selected region by using a hydrogen ion implanter in the manufacturing process of the semiconductor device, thereby facilitating the manufacturing process and improving the performance of the semiconductor device.

Abstract: A method for manufacturing a capacitor of a semiconductor device includes forming a lower metal layer over a substrate, forming a dielectric layer over the lower metal layer, forming an upper metal layer over the dielectric layer, forming an upper electrode and a dielectric layer pattern by performing a reactive ion etching process with respect to the upper metal layer using the dielectric layer as an etch stop layer, and exposing a top surface of the lower metal layer, and performing a chemical down-stream etch (CDE) process to remove a by-product of a sidewall of the upper electrode.

Abstract: Disclosed are methods of manufacturing a semiconductor device. The method of manufacturing one semiconductor device includes forming a transistor structure on a semiconductor substrate, forming a metal interconnection layer on the transistor structure, forming a protective layer on the metal interconnection layer, and implanting hydrogen ions into the semiconductor substrate having the protective layer by using a hydrogen ion implanter. Hydrogen ions are stably and effectively implanted into a selected region by using a hydrogen ion implanter in the manufacturing process of the semiconductor device, thereby facilitating the manufacturing process and improving the performance of the semiconductor device.

Abstract: Disclosed are an image sensor employing an annealing process and a manufacturing method thereof. According to the method, in one embodiment, a transistor structure is formed over a semiconductor substrate, a metal interconnection layer is formed over the transistor structure, a protective layer is formed over the metal interconnection layer, a nitride layer is formed over the protective layer, and the semiconductor substrate formed with the nitride layer is subject to a high pressure annealing process.

Abstract: A method for manufacturing a capacitor of a semiconductor device includes forming a lower metal layer over a substrate, forming a dielectric layer over the lower metal layer, forming an upper metal layer over the dielectric layer, forming an upper electrode and a dielectric layer pattern by performing a reactive ion etching process with respect to the upper metal layer using the dielectric layer as an etch stop layer, and exposing a top surface of the lower metal layer, and performing a chemical down-stream etch (CDE) process to remove a by-product of a sidewall of the upper electrode.

Abstract: Embodiments relate to a capacitor in a semiconductor device having high capacitance and a manufacturing method thereof. The capacitor includes a bottom electrode over a substrate, a dielectric layer stacked over the bottom electrode and including a first dielectric layer having a thickness of about 30 ?±2 ?, a second dielectric layer having a thickness of about 100 ?±5 ?, and a third dielectric layer having a thickness of about 30 ?±2 ?, and a top electrode over the dielectric layer. Since dielectric layers having great band gaps are deposited over and under the top and bottom of the dielectric layer having a small band gap, the electric stability and leakage current characteristic are improved. The capacitor may have a high capacitance of 8 fF or above, and may be used for semiconductor devices, for example in development of high technology DRAM and CMOS devices.

Abstract: Embodiments relate to a semiconductor device and a method for manufacturing the same. According to embodiments, a method may include forming a multilayer dielectric film on and/or over a lower metal line and forming an upper metal layer on and/or over the multilayer dielectric film. A semiconductor device fabricated by the method may include a lower metal line, a multilayer dielectric film including a plurality of layers laminated in this order on and/or over the lower metal line, and an upper metal layer arranged on and/or over the multilayer dielectric film. Accordingly, a semiconductor device may achieve a high-capacitance (i.e. not less than 6 fF/um2) capacitor that may be useful for non-memory products, e.g., logic products. In addition, the capacitor may have a high capacitance, and may exhibit superior durability and reliability due to good leakage current and breakdown voltage properties.

Abstract: The present invention relates to a method of fabricating a MIM structure capacitor. The method includes sequentially depositing a nitride film, a Ti film, and a TiN film over a lower electrode metal layer, the nitride film being an insulating layer, and a combination of the Ti/TiN layers being a upper metal electrode, for the MIM structure capacitor. The method further includes coating a photoresist layer on the upper electrode metal layer and patterning the photoresist layer, then selectively etching the upper metal electrode layer, and the nitride film by using the patterned photoresist layer as an etch mask, and finally removing nitride remaining on sidewalls of the MIM structure capacitor through a wet cleaning process.

Abstract: An ALD (Atomic Layer Deposition) apparatus includes a chamber with a sample seated in the reaction space, a supply line providing a raw material gas, an exhaust line through which a reaction gas is exhausted, and a mass analyzer for detecting reaction gases generated within the chamber.

Abstract: An ALD (Atomic Layer Deposition) apparatus includes a chamber with a sample seated in the reaction space, a supply line providing a raw material gas, an exhaust line through which a reaction gas is exhausted, and a mass analyzer for detecting reaction gases generated within the chamber.

Abstract: A volatile copper aminoalkoxide complex of formula (I) can form a copper thin film having an improved quality by metal organic chemical vapor deposition (MOCVD): wherein, R1, R2, R3 and R4 are each independently C1-4 alkyl optionally carrying one or more fluorine substituents; and m is an integer in the range of 1 to 3.