Abstract: The present invention relates to an efficient optimal facility location determination method for convex demand position demand points implemented to arrange a plurality of facilities as close as possible to given demand locations when positions of the demand locations satisfy a convex position condition. According to the efficient optimal facility location determination method for convex position demand points of the present invention, when demand locations satisfy a convex position condition, it is possible to quickly calculate a method of efficiently arranging a plurality of facilities in a very short time. In addition, according to the present invention, even if positions of demand locations do not satisfy a convex position condition, it is possible to approximate arrangement of facilities, and to be applied to various fields such as a location selection of a warehouse or data clustering.

Abstract: Disclosed are an apparatus and a method for compensating for a phase delay of a resolver signal. The apparatus includes an input/output interface, and a processor connected to the input/output interface, wherein the processor receives a command signal and the resolver signal through the input/output interface, calculates a delay time of the resolver signal with respect to the command signal based on the command signal and the resolver signal, calculates a compensation time based on the delay time, and compensates the command signal based on the compensation time.

Abstract: Provided is an electrode protection member comprising a lower structure including a carbon-based tubular body whose surface is functionalized with a hydroxy group; and a composite resin part including a thermoset resin and an ultraviolet curing resin disposed on the lower structure, a manufacturing method of the electrode protection membrane, and an all-solid-state battery including the electrode protection member.

Abstract: A method and a device for synthesizing a background and a face by considering a face shape and using a deep learning network are proposed. The method and the device are characterized to receive an input of an original image and a converted face image, remove a central part from the original image, remove edges so that a central part remains in the converted face image, and then extract a feature vector from each image to perform image synthesis.

Abstract: A display device includes a substrate including a display area and a pad area, a transistor including an active layer disposed in the display area, a gate electrode disposed on the active layer, and a source electrode and a drain electrode disposed on the gate electrode, a fan-out line disposed in the pad area, an auxiliary line disposed on the fan-out line, a first interlayer insulating layer disposed between the gate electrode and the source electrode and between the fan-out line and the auxiliary line, and a first organic layer disposed between the first interlayer insulating layer and the auxiliary line, wherein the first organic layer does not overlap the display area.

Abstract: A shoe care device provided with an accommodation space inside which shoes are accommodated includes a body; a movable body which forms the accommodation space together with the body and is coupled to the body so as to be slidable between a first position and a second position prior to the first position; a blowing part configured to circulate air in the accommodation space; and a frame body coupled to the body so as to support the body, in a form of connecting the upper surface, the lower surface, and the rear surface of the body.

Abstract: Provided is a method of stacking media in a media storage unit, which includes: receiving information about a length of a medium entering a media storage unit; calculating a delay time of a stopper corresponding to the length of the medium; and applying a delay time of the stopper calculated for each medium entering the media storage unit to differentially control activation of the stopper for each medium.

Abstract: A coil component includes a body having one surface and the other surface, opposing each other, both lateral surfaces respectively connecting the one surface and the other surface and opposing each other, and both end surfaces respectively connecting the both lateral surfaces and opposing each other; a coil unit disposed in the body; a first external electrode and a second external electrode, respectively connected to the coil unit and disposed to be spaced apart from each other on the one surface of the body; and a first insulating layer covering the other surface of the body, the both lateral surfaces of the body, and the both end surfaces of the body.

Abstract: In embodiment, a binder composition includes a multifunctional compound containing three or more functional groups, a first bifunctional epoxy resin, and a second bifunctional epoxy resin. The second bifunctional epoxy resin can have a weight average molecular weight greater than a weight average molecular weight of the first bifunctional epoxy resin, and a mass ratio of the first bifunctional epoxy resin and the second bifunctional epoxy resin is in a range from 0.45:1 to 7.0:1. In an embodiment, an epoxy-based cured product includes such binder composition. And in an embodiment, a light emitting layer includes such epoxy-based cured product.

Abstract: The present invention relates to a method and an apparatus for composing a background and a face by using a deep learning network, comprising: receiving an input of an original face image and a converted face image, and extracting data preprocessing and feature vectors for each image; generating a face feature vector mask from the extracted feature vectors; and generating a composite image by performing adaptive object normalization on the basis of the generated face feature vector mask.

Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.

Abstract: The present invention relates to a method and an apparatus for composing a background and a face by using a deep learning network, comprising: receiving an input of an original face image and a converted face image, and extracting data preprocessing and feature vectors for each image; generating a face feature vector mask from the extracted feature vectors; and generating a composite image by performing adaptive object normalization on the basis of the generated face feature vector mask.

Abstract: A method and a device for synthesizing a background and a face by considering a face shape and using a deep learning network are proposed. The method and the device are characterized to receive an input of an original image and a converted face image, remove a central part from the original image, remove edges so that a central part remains in the converted face image, and then extract a feature vector from each image to perform image synthesis.

Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Abstract: A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

Abstract: A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Abstract: A developing composition and a method of forming a pattern using the same are provided. According to embodiments of inventive concepts, the developing composition may include at least one repeating unit selected from a first repeating unit represented by Chemical Formula A1 a second repeating unit represented by Chemical Formula A2, or both the first repeating unit represented by Chemical Formula A1 and second repeating unit represented by Chemical Formula A2. The developing composition may further include a copolymer including a third repeating unit represented by Chemical Formula A3.

Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an etch-target layer, a mask layer, a blocking layer, and a photoresist layer, which are sequentially stacked on a substrate; forming a photoresist pattern, the forming the photoresist pattern including irradiating the photoresist layer with extreme ultraviolet (EUV) light; forming a mask layer, the forming the mask layer including etching the mask layer using the photoresist pattern as an etch mask; and forming a target pattern, the forming the target pattern including etching the etch-target layer using the mask pattern as an etch mask. The photoresist layer may include an organic metal oxide. The blocking layer may be a non-polar layer and may limit and/or prevent a metallic element in the photoresist layer from infiltrating into the mask layer.

Abstract: A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.

Abstract: A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a “predec” signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.