Abstract: Disclosed is a power semiconductor device, in particular, a trench type power semiconductor device for use in power electronic devices. A method of manufacturing the same is provided. The method of manufacturing the power semiconductor device adopts a trench MOSFET to decrease the size of the device, in place of a vertical type DMOSFET, under a situation in which the cost must be lowered owing to excessive cost competition. As the manufacturing process is simplified and the characteristics are improved, the cost is reduced, resulting in mass production and the creation of profit.

Abstract: Disclosed is a power semiconductor device, in particular, a trench type power semiconductor device for use in power electronic devices. A method of manufacturing the same is provided. The method of manufacturing the power semiconductor device adopts a trench MOSFET to decrease the size of the device, in place of a vertical type DMOSFET, under a situation in which the cost must be lowered owing to excessive cost competition. As the manufacturing process is simplified and the characteristics are improved, the cost is reduced, resulting in mass production and the creation of profit.

Abstract: Disclosed are a high breakdown voltage semiconductor device and a method of manufacturing the same. According to the invention, an insulation spacer capable of substitute-performing functions of an inter-insulation film, a contact hole and a mask, etc. by a self-alignment and simplifying a general process for manufacturing a device is newly arranged in a part of a gate electrode pattern. Thus, it is possible to naturally reduce the number of masks required for the device manufacture. Accordingly, a manufacturer can easily avoid various problems caused due to an increase of the number of masks. Further, it is possible to minimize a morphology abnormality of each unit patterns due to a miss-alignment of the mask and to effectively reduce a size of the device to be finally completed.

Abstract: Disclosed are a semiconductor device of high breakdown voltage and a method manufacturing the same. According to the invention, it is possible to previously prevent an increase size of the device due to a separation of a high concentration impurity layer and a gate electrode pattern by embedding the gate electrode pattern in a bottom of a semiconductor substrate, and sequentially stacking a low concentration impurity layer and a high concentration impurity layer for source/drain diffusion layers on both sides of the gate electrode pattern, thereby allowing the high concentration impurity layer to easily secure a voltage drop areas necessary for itself without being spaced from the gate electrode pattern.

Abstract: An inductor for a semiconductor device is formed within a groove in an insulating layer on a semiconductor substrate. A number of lower conductive lines are formed across the groove. A cylindrical insulator is formed over the lower conductive lines and aligned with the groove. Upper conductive lines are formed over the cylindrical insulator. The upper and lower conductive lines are slanted lengthwise along the groove in opposite directions to form a spiral coil having a circular cross-section, thereby preventing abrupt changes in the magnetic field. The ends of upper conductive lines contact the ends of the lower conductive lines so that the thickness of the coil is controlled by the thickness of the cylindrical insulator, thereby allowing the self-inductance to be increased and the positional density of the conductive lines to be freely controlled.

Abstract: An electro-static discharge (ESD) circuit of a semiconductor device, a structure thereof and a method for fabricating the ESD structure are provided. In the ESD circuit, a gate electrode and a drain region of a MOS transistor are connected to an electrical signal pad, and a Zener diode is connected to a source region of the MOS transistor. A threshold voltage of the MOS transistor is higher than an operating voltage of an internal circuit and lower than a drain junction breakdown voltage of a MOS transistor constituting the internal circuit. Also, instead of using a Zener diode for each signal pad, a common diode having a maximized junction area can be shared by a plurality of signal pads.

Abstract: There is disclosed inductors of a semiconductor device and method of making the same. The inductor according to the present invention includes a semicircle columnar groove formed in an insulating layer on a semiconductor device, a number of underlying conductive lines formed on the insulating layer in the shape of intersecting the groove, a columnar insulator formed on the insulating layer so that the bottom face of which contacts the number of the conductive lines, and upper conductive lines formed on the insulator in the shape of intersecting the insulator and connected to each of the number of the underlying conductive lines. As a result, according to the present invention, the change of magnetic field can be maintained constant since the inductors can be made spiral and increase of self-induction can be also facilitated since the thickness of the insulator and the positional density of the conductive lines can be freely controlled.

Abstract: An inductor for a semiconductor device is formed within a groove in an insulating layer on a semiconductor substrate. A number of lower conductive lines are formed across the groove. A cylindrical insulator is formed over the lower conductive lines and aligned with the groove. Upper conductive lines are formed over the cylindrical insulator. The upper and lower conductive lines are slanted lengthwise along the groove in opposite directions to form a spiral coil having a circular cross-section, thereby preventing abrupt changes in the magnetic field. The ends of upper conductive lines contact the ends of the lower conductive lines so that the thickness of the coil is controlled by the thickness of the cylindrical insulator, thereby allowing the self-inductance to be increased and the positional density of the conductive lines to be freely controlled.

Abstract: A field effect transistor includes radially extending grooves in a microelectronic substrate. At least one of the radially extending grooves includes a side branch groove extending from it. A ring-shaped gate is included on the radially extending grooves. The ring-shaped gate defines inner and outer regions of the microelectronic substrate. Source and drain regions are included in the respective inner and outer regions of the microelectronic substrate. The side branch grooves may be used to decrease on-state resistance and increase drive current of the field effect transistor.

Abstract: A field effect transistor includes radially extending grooves in a microelectronic substrate. At least one of the radially extending grooves includes a side branch groove extending from it. A ring-shaped gate is included on the radially extending grooves. The ring-shaped gate defines inner and outer regions of the microelectronic substrate. Source and drain regions are included in the respective inner and outer regions of the microelectronic substrate. The side branch grooves may be used to decrease on-state resistance and increase drive current of the field effect transistor.

Abstract: A high threshold voltage MOS transistor is described having a triple diffused drain structure in which low, medium and high concentration impurity layers overlap each other.