Patents by Inventor Tahir Malik

Tahir Malik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7539966
    Abstract: Enhanced algorithms are provided for finding circuit edit locations which utilize automated conversions from circuit schematic to physical layout design. The enhanced algorithms further include a user interface enabling the user to provide preferences, limitations, and constraints in order to bias the search to be conducted, as well as using the provided design data in order to locate the best positions for particular edit schemes, including net cuts and net joins.
    Type: Grant
    Filed: August 11, 2006
    Date of Patent: May 26, 2009
    Assignee: DCG Systems, Inc.
    Inventors: Tamal Basu, Saurabh Gupta, Tahir Malik, Hitesh Suri
  • Publication number: 20080113455
    Abstract: A method of planar etching of dissimilar materials with a Focused Ion Beam (FIB) system such as the OptiFIB manufactured by Credence Systems. The method includes adjusting the selectivity between the two materials, which varies when the ratio of the assisting chemistry pressure to the ion dose rate changes. This method can be used in such applications as FIB circuit edit, failure analysis, and cross sectioning.
    Type: Application
    Filed: June 28, 2007
    Publication date: May 15, 2008
    Inventors: Rajesh Jain, Tahir Malik, Vladimir Makarov
  • Publication number: 20080028345
    Abstract: A method and apparatus for optimizing an integrated circuit design for post-fabrication circuit editing and diagnostics. The method and apparatus is specifically directed to adding designed-for-edit modifications and designed-for-diagnostics structures to an integrated circuit design for post-fabrication circuit editing with a charged-particle beam tool. An integrated circuit design may be modified to create efficient and reliable access to specified nodes and structures, such as spare gates, by the charged-particle beam tool during subsequent testing and debugging of the fabricated device. Additionally, structures such as spare gates, spare transistors, spare metal wires, and debug circuitry may be added to an integrated circuit design to provide for easier editing of portions of the design that may fail.
    Type: Application
    Filed: October 9, 2007
    Publication date: January 31, 2008
    Applicant: Credence Systems Corporation
    Inventors: Hitesh Suri, Tahir Malik, Theodore Lundquist
  • Publication number: 20070283308
    Abstract: Enhanced algorithms are provided for finding circuit edit locations which utilize automated conversions from circuit schematic to physical layout design. The enhanced algorithms further include a user interface enabling the user to provide preferences, limitations, and constraints in order to bias the search to be conducted, as well as using the provided design data in order to locate the best positions for particular edit schemes, including net cuts and net joins.
    Type: Application
    Filed: August 11, 2006
    Publication date: December 6, 2007
    Inventors: Tamal Basu, Saurabh Gupta, Tahir Malik, Hitesh Suri